碩士 / 國立臺灣大學 / 工程科學及海洋工程學研究所 / 104 / This thesis presents designing a programmable gain amplifier (PGA), which is comprised of several amplifiers including common mode feedback circuits (CMFB), reference circuit and buffer. The common mode feedback circuits prevent any of the transistors from entering linear mode operation and maintain a specific dc value for the biasing of the next stage.
The PGA was fabricated in TSMC 0.18μm CMOS technology and total power dissipation is 15mW at 1.8V supply, providing a gain range from 13 to 86 dB with 10dB step when the control switch varies from 11111111 to 00000001 with thermometer code. The -3dB bandwidth is about 150MHz. DC offset is less than 40 mV at the output regardless of the input. The input referred noise is . The distortion is better than -53dB for 80mVP-P output signal. The PGA occupies 0.896×0.524mm2 die area, and the core area is 0.588×0.093mm2。
| Identifer | oai:union.ndltd.org:TW/104NTU05345015 |
| Date | January 2015 |
| Creators | Huai-Pei Chang, 張懷霈 |
| Contributors | Jau-Horng Chen, 陳昭宏 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 56 |
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