碩士 / 國立高雄大學 / 電機工程學系碩博士班 / 106 / To enhance electrical characteristics and reliability, material and structure of device are continuously innovate---Traditional planar MOSFET is replaced by 3D FinFET due to its performance and as well as the capability of scaling. In this work, Tri-Gate FinFETs with 16nm channel length and 10nm fin width are investigated.
Some different phenomena may occur when device structure is transformed from planar MOSFET to 3D FinFET. The influence of the Active Surface Area on the device for the former is derived from the variation of STI oxide volume during the manufacturing process, which causes compressive stress on the channel. Of which the latter is dominated by other physical mechanism due to the fact that the channel is located above STI. Also, it is found that covered by Contact Etch Stop Layer(CESL) with tensile stress, the larger Active Surface Area FinFET has, the more fin bends, resulting in stronger compressive stress onto the channel, which makes Id of nFinFET drop, but with better HCI reliability. pFinFET is the reverse.
We also investigated the impact of single and multi-fin structure in FinFET. The interaction between coupling effect and the fin bending (compressive stress caused by tensile CESL) affects the behavior of FinFET. In consequence, multi-fin structured nFinFET provides slightly lower Id, but better HCI reliability, whereas a pFinFET shows slightly complex relationship between Id and fin number structure and worse HCI reliability as the number of fins increases.
| Identifer | oai:union.ndltd.org:TW/106NUK00442005 |
| Date | January 2018 |
| Creators | CHUANG, CHIAO-FENG, 莊喬丰 |
| Contributors | YEH, WEN-KUAN, 葉文冠 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 74 |
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