碩士 / 國立交通大學 / 資訊科學與工程研究所 / 107 / Standard cells are basic components in digital IC designs, and they play an important role to determine the performance of a digital IC. With the continuous progresses of technology nodes, the feature size continues to shrink. Due to the design for manufacturing (DFM) considerations, the design rules become more complicated. This makes it much harder for cell routing algorithm to consider complex design rules during routing, which drastically increases the difficulty of developing automated cell layout synthesis tools. Therefore, how to effectively fix design rules in post-routing optimization stage becomes a great challenge. The complex design rules considered in this paper mainly specify the relationship among multiple objects. Along with the variety of design specification, the relationship among the target object and the surrounding objects changes. In addition, design rules related to double patterning lithography used in the advanced process are also considered simultaneously. We first introduce the complex design rules and the lithography rules, which can often be found in advanced processes of the FinFET architecture. A post-routing optimization framework based on linear integer programming are then proposed. The framework is applied to optimize the cell layouts routed without considering several common complex design rules. Furthermore, it also improves cell performance through adding redundant vias to increase the current flowing through a cell. The results examined with design rule check (DRC) show that proposed post-routing algorithm apply on 348 cells and 100% cells can obtain violation-free result.
| Identifer | oai:union.ndltd.org:TW/107NCTU5394043 |
| Date | January 2018 |
| Creators | Su, Yang-Hong, 蘇揚鴻 |
| Contributors | Li, Yih-Lang, 李毅郎 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 54 |
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