This thesis report presents system specification, such as frequency and output power level, and selection topology of an oscillator circuit suitable for a CMOS Integrated Doppler radar application, in order to facilitate short range target detection within 5-15 m range, using a 0.35 μm CMOS process. With this selected CMOS process, the frequency band at 2.45 GHz or 5 GHz, with a maximum output power level of 25 mW (e.i.r.p), is found to be appropriate for the whole system to obtain a good performance. In this thesis work, a Ring VCO with pseudo-differential architecture has been designed and optimised for 2.45 GHz application. However, for 5 GHz application, a differential cross-coupled LC VCO oscillator topology has been suggested and it is so designed that it can be further scaled down to operate at a frequency of 2.45 GHz. The performance of the oscillator circuits has been tested at circuit level and has been presented as simulation results in this report.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-129222 |
| Date | January 2016 |
| Creators | Biswas, Shampa |
| Publisher | Linköpings universitet, Elektroniska Kretsar och System |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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