Since different companies are introducing new capabilities and features on their products, the demand for computing power and performance in real-time systems is increasing. To achieve higher performance, processor's manufactures have introduced multi-core platforms. These platforms provide the possibility of executing different tasks in parallel on multiple cores. Since tasks share the same cache level, they face some interference that affects their timing predictability. This thesis is divided into two parts. The first part presents a survey on the existing solutions that others have introduced to solve the problem of cache interference that tasks face on multi-core platforms. The second part's focus is on one of the hardware-based techniques introduced by Intel Cooperation to achieve timing predictability of real-time tasks. This technique is called Cache Allocation Technology (CAT) and the main idea of it is to divide last level cache on some partitions called classes of services that will be reserved to specific cores. Since tasks of one core can only access the assigned partition of it, cache interference will be decreased and a better real-time tasks' performance will be achieved. In the end to evaluate CAT efficiency an experiment is conducted with different test cases and the obtained results show a significant difference on real-time tasks' performance when CAT is applied.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:mdh-48542 |
| Date | January 2020 |
| Creators | Satka, Zenepe, Hodžić, Hena |
| Publisher | Mälardalens högskola, Inbyggda system, Mälardalens högskola, Inbyggda system |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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