A 12 channel real-time GPS L1 C/A-code software receiver has been implemented on a Desktop with 1.84GHz Intel CPU. The software receiver has the capability to acquire new satellites coming in, keep tracking of satellites in view and give a user solution accuracy of 30 meters. This study also explores a real-time correlator for the GLONASS L1 signals. This software receiver is going to be used for scientific research and education. This work is a part of the ongoing effort to develop a low-cost, flexible, and capable GNSS receiver for use as a scientific instrument and for GNSS receiver technology development.
The software receiver developed here makes use of a reconfigurable RF front end called the Universal Software Radio Peripheral (USRP) with a maximum real sampling frequency of 8MHz of complex samples. The USRP uses interchangeable daughter boards to down-convert and digitize RF signals in the range of DC to 2.9GHz, where each daughterboard covers an overlapping subset of this range. This RF front end was chosen for its flexibility and ease of use. The output of the RF front end is 8-bit complex I/Q samples output via a USB cable.
The software receiver processing of the RF front-end outputs is accomplished by using bit-wise parallelism, as described in References [1] and [2]. In order to process the incoming RF data in this manner, the 8-bit complex I/Q samples are quantized to two bits. This is performed in the software receiver prior to signal correlation. In-phase and quadrature accumulations are computed using bit-wise parallel techniques, and these accumulations are used to drive code tracking delay-lock loops (DLLs) and carrier tracking phase-lock loops(PLLs). The computation of accumulations and the implementation of DLLs and PLLs for the GNSS ranging signals are detailed in the thesis.
The software receiver is developed by C++. It consists of two parts: the software receiver core program and a simple interface. The current software receiver runs under Ubuntu Linux systems, but it is convenient to implement on other Linux systems. The software prerequisites for the software receiver are GNUradio and QT4.0. GNUradio is an open source program which provides the driver for the USRP board. The current version used by the software receiver is GNUradio-3.1.3. The user interface program is developed by using the classes provided by QT4.0. The hardware of the whole system consists of computer with intel 1.84 GHz CPU and 2GHz RAM, GPS and GLONASS antenna, USRP, and analogue signal generator. One problem with the USRP is that its on-board oscillator is not particularly stable in terms of frequency and phase. One solution to this problem is to use a high-quality external oscillator. An Agilent N5181A MXG Analog Signal Generator configured to output a 64MHz signal has been used as an external input clock to the USRP. This oscillator has a stated frequency error of 1 ppm/yr, has decent short-term frequency stability, and has a reasonably low phase noise at 64MHz. The outputs of the USRP board are 8 bits complex data with 4MHz sampling frequency with an intermediate frequency of zero. The input data are re-quantized and pack into 32-bit of integers. The total CPU usage of the software receiver is about 30 ~ 40% of the 1.84GHz CPU. The software receiver is started with a FFT based acquisition. The acquisition results are then used to initialize the receiver. The background search of satellites is accomplished by a serial search of PRN code replicas. The novelty of the the software receiver developed in this study is as follows: first, a reconfigurable RF front end is used which makes the software receiver extendable.Second, The software is developed with C++ in the general Linux system; This will make the software receiver easy to maintain and update. Third, the current software receiver also explores the process of GLONASS L1 signals with bit-wise parallel correlation. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/40873 |
| Date | 11 March 2010 |
| Creators | Peng, Senlin |
| Contributors | Electrical and Computer Engineering, Scales, Wayne A., Bailey, Scott M., Reed, Jeffrey H. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis |
| Format | application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | peng_s_t_2010.pdf |
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