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Modelling and verification in structured integrated circuit design

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1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.252848

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:252848
Date	January 1980
Creators	Buchanan, Irene
Publisher	University of Edinburgh
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation
Source	http://hdl.handle.net/1842/13224