Return to search

Partial dynamic reconfiguration of FPGAs for systolic circuits

No description available.

1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.270913

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:270913
Date	January 2002
Creators	Cadenas Medina, Oswaldo
Publisher	University of Reading
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation
Source	http://centaur.reading.ac.uk/18884/