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Design of an FPGA based parallel architecture processor for displaying CSG volumes and surfaces

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1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.321348

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:321348
Date	January 1996
Creators	Cevik, Ulus
Publisher	University of Sussex
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation