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Development of SiC heterojunction power devices

Silicon carbide (SiC), with its wide bandgap, high thermal conductivity and natural oxide is a substrate that has given rise to a new generation of power devices than can operate at high temperature, high power and high frequency, though the material is not without its problems. SiC "heterojunction devices" are layers of germanium (Ge) or silicon (Si) that are deposited via molecular beam epitaxy (MBE) or wafer bonded onto the SiC surface. These narrow bandgap thin films can provide a high mobility channel region overcoming SiC's crippling channel mobility, which is most often made worse by a high density of interface states. Concentrating predominantly on Ge/SiC heterojunctions, this thesis characterises the physical and electrical nature of these structures, investigating the rectifying properties of the heterojunction interface and the ability of these layers to support a depletion region. A physical analysis of the layers revealed that the Ge formed in an unexpectedly uniform fashion, given the large lattice mismatch involved. At a deposition temperature of 500oC the Ge initially clumped into wide, shallow islands before merging, forming at best a 300 nm polycrystalline layer with a surface roughness of only 6 nm. This was in contrast to MBE deposited Si/SiC layers that formed tall islands that at 1 μm thick, still had not merged. After being formed into Ge/SiC heterojunction diodes they were electrically characterised. The layers displayed near ideal (η = 1:05) turn-on characteristics, low turn-on voltage (approximately 0.3 V less than Ni/SiC SBDs), reasonable on-resistance (12 m­Ωcm2) and minimal leakage current. The devices were shown to suffer severe Fermi level pinning that defined the way the materials' bands aligned. This occurred as a result of an inhomogeneous interface that also caused fluctuations in the size of the Schottky barrier height across the interface. New characterisation techniques relating to these phenomena were applied to a heterojunction for the first time. MBE formed Ge/SiC layers and wafer bonded Si/SiC layers were formed into MOS capacitors through the deposition of the high-K dielectric hafnium oxide (HfO2). The increased conduction band offset between oxide and narrow bandgap semiconductor suppressed leakage problems often seen in HfO2/SiC structures. Capacitance-voltage results showed that they could both support a depletion region, though the best results came from the MBE Ge/SiC diodes. Current-voltage results showed that the more uniform Si/SiC devices could block 3.5 MV/cm.

Identiferoai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:549224
Date January 2011
CreatorsGammon, P. M.
PublisherUniversity of Warwick
Source SetsEthos UK
Detected LanguageEnglish
TypeElectronic Thesis or Dissertation
Sourcehttp://wrap.warwick.ac.uk/44625/

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