Yau Po Chung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Includes bibliographical references (leaves 91-92). / Abstract also in Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 2 --- Background --- p.3 / Chapter 2.1 --- Temporal Theories --- p.3 / Chapter 2.2 --- Related Works --- p.4 / Chapter 2.2.1 --- Consistency and Satisfiability of Timing Specifications --- p.4 / Chapter 2.2.2 --- Symbolic Constraint Satisfaction --- p.5 / Chapter 3 --- Previous Developed Work --- p.7 / Chapter 3.1 --- Previous Problem Domain --- p.7 / Chapter 3.1.1 --- Basics of MC68000 Read Cycle --- p.7 / Chapter 3.2 --- Knowledge-based System Structure --- p.9 / Chapter 3.3 --- Diagnostic Reasoning Mechanisms --- p.10 / Chapter 3.4 --- Time Range Approach --- p.11 / Chapter 3.4.1 --- Time Range Representation --- p.11 / Chapter 3.4.2 --- Constraint Satisfaction of Time Ranges --- p.12 / Chapter 3.4.3 --- Constraint Propagation of Time Ranges --- p.13 / Chapter 3.5 --- Fuzzy Time Point Approach --- p.14 / Chapter 3.5.1 --- Fuzzy Time Point Models --- p.14 / Chapter 3.5.2 --- Definition of Fuzzy Time Points --- p.15 / Chapter 3.5.3 --- Constraint Propagation of Fuzzy Time Points --- p.17 / Chapter 3.5.4 --- Constraint Satisfaction of Fuzzy Time Points --- p.18 / Chapter 4 --- The Proposed Segmented Time Range Approach --- p.20 / Chapter 4.1 --- Introduction --- p.20 / Chapter 4.2 --- The Insufficiency of The Existing Time Range Approach --- p.22 / Chapter 4.3 --- Segmented Time Range Approach --- p.23 / Chapter 4.3.1 --- The Representation --- p.23 / Chapter 4.3.2 --- Constraint Propagation and Satisfaction --- p.25 / Chapter 4.3.3 --- Contributions --- p.25 / Chapter 4.3.4 --- Limitations --- p.29 / Chapter 4.4 --- Conclusion --- p.30 / Chapter 5 --- New Problem Domain and Our New System --- p.31 / Chapter 5.1 --- Introduction --- p.31 / Chapter 5.2 --- Pentium-SRAM Interfacing Problem --- p.31 / Chapter 5.2.1 --- Asynchronous SRAM Solution --- p.32 / Chapter 5.2.2 --- Synchronous SRAM Solution --- p.33 / Chapter 5.3 --- The Knowledge Base --- p.35 / Chapter 5.4 --- Characteristics of Our New System --- p.35 / Chapter 6 --- Burst Read Cycle --- p.37 / Chapter 6.1 --- Introduction --- p.37 / Chapter 6.2 --- Asynchronous SRAM Solution --- p.37 / Chapter 6.2.1 --- Implementation --- p.39 / Chapter 6.2.2 --- Implementation Results --- p.45 / Chapter 6.3 --- Synchronous SRAM Solution --- p.48 / Chapter 6.3.1 --- Implementation --- p.49 / Chapter 6.3.2 --- Implementation Results --- p.56 / Chapter 6.4 --- Conclusion --- p.58 / Chapter 7 --- Burst Write Cycle --- p.60 / Chapter 7.1 --- Introduction --- p.60 / Chapter 7.2 --- Asynchronous SRAM Solution --- p.60 / Chapter 7.2.1 --- Implementation --- p.61 / Chapter 7.2.2 --- Implementation Results --- p.67 / Chapter 7.3 --- Synchronous SRAM Solution --- p.71 / Chapter 7.3.1 --- Implementation --- p.71 / Chapter 7.3.2 --- Implementation Results --- p.79 / Chapter 7.4 --- Conclusion --- p.82 / Chapter 8 --- Conclusion --- p.83 / Chapter 8.1 --- Summary of Achievements --- p.83 / Chapter 8.2 --- Future Development --- p.86 / Appendix Some Characteristics of Our New System --- p.89 / Bibliography --- p.91
| Identifer | oai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_322222 |
| Date | January 1998 |
| Contributors | Yau, Po Chung., Chinese University of Hong Kong Graduate School. Division of Systems Engineering and Engineering Management. |
| Source Sets | The Chinese University of Hong Kong |
| Language | English, Chinese |
| Detected Language | English |
| Type | Text, bibliography |
| Format | print, xii, 92 leaves : ill. ; 30 cm. |
| Rights | Use of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/) |
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