近年來感測器、集成電路及無線通信的科技迅速發展，促使IEEE802.15工作小組6（TG6）致力硏究一個新的無線通信標準─人體區域網路（BAN）。這個新標準特別考量在人體上、人體內或人體周邊的應用。雖然BAN至今還未達成最後定案，不同類型的應用方案已被廣泛提出。這些方案可分為醫療應用（例如：生命徵象感測和植入式治療）及非醫療應用（例如：消費性電子、個人娛樂和遙遠控制）。無線感測節點〈WSN）的基本要求包括輕巧、廉價及低耗電量。因此，本論文提出了一個符合以上要求的注入式鎖態發射機。此外，我們設計了三個發射機的內部模組。由於BAN的物理層例如調變方式和頻譜配置還未完全製訂，本文的電路設計將基於IEEE802.15 TG6的初步建議。 / 第一個模組是一個利用同相位雙路輸入及電流再使用技術的次毫瓦、第一次諧波LC注入式鎖態振盪器〈ILO）。該振盪器操作範圍在醫療植入式通訊服務〈MICS）頻段，並已採用了0.13-μm CMOS工藝實現而僅佔有200 m x 380 m芯片面積。實驗結果表明，在輸入動力0 dBm時，其鎖定範圍可達800 MHz (150 950 MHz) 。最重要的是，該ILO擁有-30 dBm的高輸入靈敏度，同時在1-V供電下只消耗660 A靜態電流。超低的靜態電流使WSN能從人體收集能量而變得完全自主。 / 第二個模組是一個低功耗MICS非整數型頻率合成器，其目的在於選擇信道。雖然整數鎖相環由於其低複雜性而被廣泛使用，對MICS頻段而言並不是一項良好方案。主要原因在於其信道寬只有300 kHz，速度、頻率解析度和相位雜訊變得很難平衡。為此，我們採用0.13-μm CMOS製程設計了一個4階第二型和差積分〈Σ-）調變器分數鎖相環。為了抑制混附單頻信號，二階單迴路數字Σ-調變器加入了抖動。仿真結果顯示該頻率合成器能在15 s內鎖定，同時在1.5-V供電下只消耗4 mW功耗。 / 第三個模組是一個高效能、完全集成的E類功率放大器〈PA）。該PA採用了自給偏壓反相器作為前置放大器，操作範圍在MICS頻段及工業、科學和醫學〈ISM）頻段。在0.18-m CMOS工藝下實現的該PA佔有0.9 mm x 0.7 mm芯片面積。實驗結果表明，在1.2-V供電下及操作頻率是433 MHz時，該PA的漏極效率及輸出功率分別可達40.2 %和14.7 dBm。當操作頻率從380 MHz 到460 MHz，該PA仍能保侍最少34.7 %的漏極效率。此設計適用於低數據傳輸率、固定振幅調變，例如：QPSK、OQPSK等。 / Recent technological advances in sensors, integrated circuits and wireless communication enable miniature devices located on, in or around the human body to form a new wireless communication standard called wireless Body Area Network (BAN). Although BAN is still being investigated by the IEEE 802.15 Task Group 6 (TG6), a vast variety of applications has been proposed which can be categorized into medical applications (e.g. vital signs monitoring and implantable therapeutic treatment) and non-medical applications (e.g. consumer electronics and remote control). The basic requirements of each Wireless Sensor Node (WSN) include light weight, small form-factor, low cost and low power consumption. This thesis proposes an injection-locked transmitter which is a potential candidate to minimize the power consumption of the RF transmitter in WSNs. Three circuit blocks in the proposed injection-locked transmitter are designed and implemented. Since the physical layer of BAN, such as modulation scheme and frequency allocation, has still not been finalized yet, the prototypes in this thesis are designed based on the preliminary suggestions made by the IEEE 802.15 TG6. / The first circuit block is a sub-mW, current-reused first-harmonic LC injection-locked oscillator (ILO) using in-phase dual-input injection technique, operating in the Medical Implantable Communications Service (MICS) band from 402MHz to 405 MHz for medical implants. It has been fabricated in a standard 0.13-m CMOS technology; occupying 200 m x 380 m. Measurement results show that the proposed ILO features a wide locking range of 800 MHz (150-950 MHz) at input power of 0 dBm. More importantly, it has a high input sensitivity of -30 dBm to lock the 3-MHz bandwidth of the MICS band, while consuming only 660 W at 1-V supply. This ultra-low power consumption enables autonomous WSNs by energy harvested from the human body. / The second circuit block is a low power MICS fractional-N frequency synthesizer for channel selection. Although integer-N phase-locked loop (PLL) is widely used due to its low circuit complexity, it is not considered as a good solution for MICS band where the channel spacing is just 300 kHz, due to the severe trade-off between speed, frequency resolution and phase noise performance. To solve this issue, a 4th-order type-II Σ- fractional-N PLL is designed using a standard 0.18-m CMOS technology. A 2nd-order single-loop digital Σ- modulator with dither is designed to eliminate the spurious tones. Simulation results verify that the synthesizer achieves 15 s locking time and consumes 4 mW at a power supply of 1.5 V. / Finally, a power-efficient fully-integrated class-E power amplifier with a self-biased inverter used as a preamplifier stage has been implemented in a standard 0.18-m CMOS process, with 0.9 mm x 0.7 mm active area. It operates in both MICS band for implantable devices and Industrial, Scientific and Medical (ISM) band for wearable devices. Experimental results shows that it achieves 40.2 % drain efficiency while output power is 14.7 dBm at 433 MHz under 1.2-V supply. Moreover, the drain efficiency maintains at least 34.7 % over the frequency range from 380 MHz to 460 MHz. This design is suitable for low data-rate, constant envelope modulation, such as QPSK, OQPSK, etc. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Li, Kwan Wai. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references. / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese. / Abstract of thesis entitled: --- p.I / 摘要 --- p.IV / Contents --- p.VI / List of Figures --- p.XI / List of Tables --- p.XVII / Acknowledgement --- p.XVIII / Chapter CHAPTER 1. --- Introduction --- p.1 / Chapter 1.1 --- Motivation for body area network (BAN) --- p.1 / Chapter 1.2 --- Standardization of BAN and its positioning between different communication technologies --- p.3 / Chapter 1.3 --- Classification of BAN and its potential applications --- p.5 / Chapter 1.4 --- Requirements and challenges of BAN --- p.7 / Chapter 1.5 --- Research objectives and organization of this dissertation --- p.9 / References --- p.11 / Chapter CHAPTER 2. --- Background information of biomedical transceivers --- p.12 / Chapter 2.1 --- MICS band --- p.12 / Chapter 2.1.1 --- Frequency allocation --- p.12 / Chapter 2.1.2 --- Output power --- p.13 / Chapter 2.1.3 --- Transmit spectral mask --- p.14 / Chapter 2.1.4 --- Transmit center frequency tolerance --- p.14 / Chapter 2.1.5 --- Channel model --- p.15 / Chapter 2.1.6 --- Link budget --- p.17 / Chapter 2.2 --- Fundamental figure of merits for transceivers --- p.18 / Chapter 2.2.1 --- Noise figure, noise floor and receiver sensitivity --- p.18 / Chapter 2.2.2 --- Transmitter energy efficiency --- p.19 / References --- p.20 / Chapter CHAPTER 3. --- Review of transmitter architectures --- p.21 / Chapter 3.1 --- Overview --- p.21 / Chapter 3.2 --- Architectures --- p.22 / Chapter 3.2.1 --- Quadrature --- p.22 / Chapter 3.2.2 --- Polar --- p.23 / Chapter 3.2.3 --- PLL-based --- p.24 / Chapter 3.2.4 --- Injection-locked --- p.26 / Chapter 3.3 --- Radio architecture selection for biomedical systems in BAN --- p.27 / Chapter 3.3.1 --- Data-rate --- p.27 / Chapter 3.3.2 --- Modulation scheme --- p.28 / Chapter 3.3.3 --- Proposed transmitter architecture --- p.28 / References --- p.31 / Chapter CHAPTER 4. --- Design of sub-mW injection-locked oscillator --- p.33 / Chapter 4.1 --- Introduction --- p.34 / Chapter 4.2 --- Circuit design and analysis --- p.34 / Chapter 4.3 --- Experimental results --- p.47 / Chapter 4.4 --- Summary --- p.55 / References --- p.56 / Chapter CHAPTER 5. --- Design of low-power fractional-N frequency synthesizer --- p.58 / Chapter 5.1 --- Synthesizer architectures --- p.59 / Chapter 5.2 --- PLL design fundamentals --- p.63 / Chapter 5.2.1 --- Stability --- p.63 / Chapter 5.2.2 --- Phase noise --- p.65 / Chapter 5.3 --- Proposed architecture --- p.67 / Chapter 5.4 --- System design --- p.68 / Chapter 5.4.1 --- Stability --- p.68 / Chapter 5.4.2 --- Phase noise --- p.73 / Chapter 5.5 --- Σ modulation in fractional-N synthesis --- p.75 / Chapter 5.5.1 --- Basic operating principles --- p.76 / Chapter 5.5.2 --- An accumulator as a first-order Σ- modulator --- p.78 / Chapter 5.5.3 --- Noise analysis --- p.80 / Chapter 5.5.4 --- Architectures --- p.84 / Chapter 5.5.5 --- Design and modeling --- p.87 / Chapter 5.5.6 --- Digital circuit implementation --- p.99 / Chapter 5.5.7 --- Measurement results --- p.104 / Chapter 5.6 --- Time domain behavioral modeling --- p.104 / Chapter 5.7 --- Design of building blocks --- p.106 / Chapter 5.7.1 --- VCO --- p.107 / Chapter 5.7.1.1 --- Principles --- p.107 / Chapter 5.7.1.2 --- Circuit design --- p.111 / Chapter 5.7.2 --- PFD --- p.131 / Chapter 5.7.2.1 --- Principles --- p.131 / Chapter 5.7.2.2 --- Circuit design --- p.133 / Chapter 5.7.3 --- CP --- p.136 / Chapter 5.7.3.1 --- Principles --- p.136 / Chapter 5.7.3.2 --- Circuit design --- p.137 / Chapter 5.7.4 --- Frequency divider --- p.138 / Chapter 5.7.4.1 --- Principles --- p.138 / Chapter 5.7.4.2 --- Circuit design --- p.145 / Chapter 5.7.5 --- Loop filter --- p.148 / Chapter 5.8 --- Layout issues --- p.149 / Chapter 5.9 --- Overall simulation results --- p.150 / Chapter 5.1 --- Summary --- p.152 / References --- p.153 / Chapter CHAPTER 6. --- Design of high-efficient power amplifier --- p.154 / Chapter 6.1 --- Classification of PAs --- p.154 / Chapter 6.2 --- Circuit design considerations --- p.158 / Chapter 6.3 --- Experimental results --- p.160 / Chapter 6.4 --- Summary --- p.164 / References --- p.166 / Chapter CHAPTER 7. --- Conclusions and future work --- p.167 / Chapter 7.1 --- Conclusions --- p.167 / Chapter 7.2 --- Future work --- p.168 / References --- p.171
| Identifer | oai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_327981 |
| Date | January 2012 |
| Contributors | Li, Kwan Wai., Chinese University of Hong Kong Graduate School. Division of Electronic Engineering. |
| Source Sets | The Chinese University of Hong Kong |
| Language | English, Chinese |
| Detected Language | English |
| Type | Text, bibliography |
| Format | electronic resource, electronic resource, remote, 1 online resource (xviii, 171 leaves) : ill. (some col.) |
| Rights | Use of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/) |
Page generated in 0.0079 seconds