Thesis (MScEng)--University of Stellenbosch, 2002. / ENGLISH ABSTRACT: Very Large Scale Integration (VLSI) of the Rapid Single Flux Quantum (RSFQ)
superconducting logic family is researched. Insight into the design methodologies used
for large-scale digital systems and related logistics are reviewed. A brief overview of
basic RSFQ logic gates with in mind their application in a cell based layout scheme
suited for RSFQ is given. A standard cell model is then proposed, incorporating these
cells, on which, a library of low temperature superconducting (L TS) cells are laid out.
Research is made into computer techniques for storing and manipulating large-scale
circuit netlists. On this base, a method of technology mapping Boolean circuits to an
RSFQ equivalent is achieved. Placements on-chip are made, optimized for minimum net
length, routed and exported to a popular electronic mask format. Finally, the convergent
technology fields of solid state cooling and high-temperature superconducting electronics
(HTS) are investigated. This leads to a proposal for a low profile, low cost, HTS
cryopackaging concept. / AFRIKAANSE OPSOMMING: Grootskaalse integrasie (VLSI) van die "Rapid Single Flux Quantum" (RSFQ)
supergeleidende familie van logiese hekke word uiteengesit. Insig in die ontwerpmetodes
vir grootskaaIse digitale stelsels en verwante aspekte word ondersoek. 'n Kort oorsig van
basiese RSFQ logiese hekke word gegee, met hulle toepassing in 'n uitlegskema wat
geskik is vir RSFQ. 'n Standaard sel model, wat bogenoemde selle insluit, word
voorgestel en 'n selbiblioteek word uitgele vir lae temperatuur supergeleidende bane.
Ondersoek word ingestel na die manipulasie van die beskrywing van elektroniese bane en
'n manier om logiese Boolese baanbeskrywings om te skakel na fisiese RSFQ bane. Die
fisiese plasing van selle word bespreek ten einde die verbindingslengte tussen selle te
minimeer. Die finale uitleg word omgeskakel na 'n staandaard elektroniese formaat vir
baanuitlegte. Die konvergerende tegnologievelde van "soliede toestand" verkoeling en
hoe-temperatuur supergeleidende elektroniese bane word bespreek. Ten slotte word 'n
nuwe tipe, lae profiel en lae koste kriogeniese verpakking voorgestel.
| Identifer | oai:union.ndltd.org:netd.ac.za/oai:union.ndltd.org:sun/oai:scholar.sun.ac.za:10019.1/49734 |
| Date | 12 1900 |
| Creators | Gross, Peter Alan |
| Contributors | Perold, W. J., Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. |
| Publisher | Stellenbosch : Stellenbosch University |
| Source Sets | South African National ETD Portal |
| Language | en_ZA |
| Detected Language | English |
| Type | Thesis |
| Format | 151 p. : ill. |
| Rights | Stellenbosch University |
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