The phenomenon known as Negative Bias Temperature Instability (NBTI) impacts the operational characteristics of Complementary Metal Oxide Semiconductor (CMOS) devices, and tends to have a stronger effect on p-channel devices. This instability is observed with an applied "on" biasing during normal operation and can be accelerated with thermal stress. A normal applied electrical bias on CMOS transistors can lead to the generation of interface states at the junction of the gate oxide and the transistor channel. The hydrogen that normally passivates the interface states can diffuse away from the interface. As a result, the threshold voltage and transconductance will change. These interface states can be measured to determine the susceptibility to NBTI of the devices. For this purpose, a charge pumping experiment and other On-the-Fly techniques at certain temperatures can provide the interface state density and other valuable data. NBTI can impact current technological fabrication processes, such as those provided to the government from IBM. This paper explains this testing of current submicron transistor technology that will be used for military applications. / US Navy (USN) author.
| Identifer | oai:union.ndltd.org:nps.edu/oai:calhoun.nps.edu:10945/2724 |
| Date | 06 1900 |
| Creators | Schuster, Christopher Mark. |
| Contributors | Weatherford, Tood R., Parker, Andrew A., Naval Postgraduate School (U.S.) |
| Publisher | Monterey California. Naval Postgraduate School |
| Source Sets | Naval Postgraduate School |
| Detected Language | English |
| Type | Thesis |
| Format | xvi, 57 p. : col. ill. ;, application/pdf |
| Rights | Approved for public release, distribution unlimited |
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