The U. S. Navy is pursuing an all electric ship that will require enormous amounts of power for applications such as electric propulsion. Reliability and redundancy in the electronics are imperative, since failure of a critical system could leave a ship stranded and vulnerable. A parallel inverter drive topology has been proposed to provide reliability and redundancy through load sharing. The parallel architecture enables some functionality in the event that one of the inverters fails. This thesis explores paralleling current-mode inverters of different power levels and fidelities. A 50-kVA, three-phase hysteresis controlled inverter is designed, built, and tested at low power. The inverter is then tested in parallel with a low frequency, bulk inverter to demonstrate current sharing capability.
| Identifer | oai:union.ndltd.org:nps.edu/oai:calhoun.nps.edu:10945/850 |
| Date | 09 1900 |
| Creators | Fillmore, Paul F. |
| Contributors | Ashton, Robert, Yun, Xiaoping, Systems Technology |
| Publisher | Monterey, California. Naval Postgraduate School |
| Source Sets | Naval Postgraduate School |
| Detected Language | English |
| Type | Thesis |
| Format | xvi, 71 p. : col. ill. ;, application/pdf |
| Rights | This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted. |
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