Thesis deals with the challenges in the field of BLDC motors control with the utilization of Field Programmable Gate Arrays (FPGA). Using the modular dSPACE hardware with the FPGA board, these issues are solved: sensored and sensorless control, real-time simulation of BLDC motor and control of BLDC motor in degraded mode. FPGA design is made using the System Generator for DSP from Xilinx. The side effect of work is to show that with the expansion of high-level tools for FPGA design, the implementation of algorithms for FPGA is relatively quick and efficient and does not require years of experience and big knowledge of field programmable gate arrays. The implementation of algorithms on FPGA instead of processors brings many advantages, in the first place the high speed processing and low latency.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:230937 |
| Date | January 2013 |
| Creators | Sova, Václav |
| Contributors | Toman, Jiří, Grepl, Robert |
| Publisher | Vysoké učení technické v Brně. Fakulta strojního inženýrství |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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