This work deals with silicon chip interconnection with a view to high current up to 10A. A wire bonding method is used for interconnection. The first part of investigation is focused on the modeling and simulation by the help of program ANSYS. Thermo mechanical stressing and current density is important parts of this research. Stress and current density distribution are results of the first part. The experimental part describes transition resistance, electro migration and thermal process in the connection of wire and chip pad. A controlled current source (0 – 10A) is used for measurement. The current source makes it possible to 4-point method measurement with sampling rate 1,5MHz.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:233455 |
| Date | January 2009 |
| Creators | Novotný, Marek |
| Contributors | Mach,, Pavel, Hulenyi,, Ladislav, Szendiuch, Ivan |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/doctoralThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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