The thesis deals with design of novel circuit structure suitable for hardware implementations of feedforward neural networks. The structure utilizes innovative data bus structure. The main contribution of the structure is in optimization of the utilization of implemented computing units. Proposed architecture is flexible and suitable for implementations of variety of feedforward neural network structures.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:233645 |
| Date | January 2014 |
| Creators | Bohrn, Marek |
| Contributors | Ďuračková, Daniela, Husák, Miroslav, Fujcik, Lukáš |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/doctoralThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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