This master's thesis focuses on designing and implementing a framework that would offer basic program resources for application development on hardware platform FITkit Minerva. First part of this work focuses on designing a data channel between PC and the kit for which the USB interface was used. Next part focuses on implementing a channel between an ARM based microcontroller and FPGA Xilinx Spartan-6. That led to creating a special system inside FPGA that allows adding new HW components that communicate with the microcontroller, which can be used for implementing HW acceleration techniques. Another outcome of this work is a debugging interface that allows to program and debug FPGA using development environment Xilinx ISE without a need of the original Xilinx JTAG adapter. This was achieved by using the XVC protocol that allows to create a custom JTAG adapter that in this case was implemented in the software of the microcontroller.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:234989 |
| Date | January 2015 |
| Creators | Buchta, Petr |
| Contributors | Sekanina, Lukáš, Vašíček, Zdeněk |
| Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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