This diploma thesis deals with the use of Cartesian Genetic Programming (CGP) for combinational circuits design. The work addresses the issue of optimizaion of selected logic circuts, arithmetic adders and multipliers, using Cartesian Genetic Programming. The implementation of the CPG is performed in the Python programming language with the aid of NumPy, Numba and Pandas libraries. The method was tested on selected examples and the results were discussed.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:442801 |
| Date | January 2021 |
| Creators | Hojný, Ondřej |
| Contributors | Hůlka, Tomáš, Matoušek, Radomil |
| Publisher | Vysoké učení technické v Brně. Fakulta strojního inženýrství |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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