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Test Pattern Generation for Double Transition faults

Keerthana Samala, for the Master of Science degree in Electrical and Computer, presented on 05/11/2018, at Southern Illinois University Carbondale. TITLE: Test Pattern Generation for Double Transition Faults MAJOR PROFESSOR: Dr. Spyros Tragoudas Under double transition fault model, a fault is associated with a pair of lines and a pair of transitions on these lines. The proposed double transition fault model includes set of cases where the increased delay of a single faulty line may be too small to cause the faulty behavior of the circuit. However, when this delay propagates through another faulty line then the total delay is assumed to be beyond the specified circuit delay which may cause the circuit to fail, thus causing a double transition fault. We propose a test generation procedure for double transition faults, considering different cases of the model. For this purpose a PODEM based Automatic Test Pattern Generation Tool was modified and used. We present experimental results of this procedure for several ISCAS '85 and ISCAS'89 benchmark circuits.

Identiferoai:union.ndltd.org:siu.edu/oai:opensiuc.lib.siu.edu:theses-3388
Date01 August 2018
CreatorsSamala, Keerthana
PublisherOpenSIUC
Source SetsSouthern Illinois University Carbondale
Detected LanguageEnglish
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