This work optimizes a CMOS image pixel sensor circuit for being used in a compressive sensing (CS) image sensor. The CS image sensor sums neighbor pixel outputs and hence reduces analog to digital conversions. Efforts are also made to improve the circuit that performs such pixel summation. With the optimized design, a CMOS image sensor circuit with a compression ratio of 4 is designed using a 130 nm CMOS technology from Global foundries. The design pixel sensor has a 256X256 pixel array. Simulation shows that the developed image sensors can achieve peak signal to noise ratio (PSNR) of 28 dB and 37.8 dB for benchmark images Cameraman and Lenna, respectively.
| Identifer | oai:union.ndltd.org:siu.edu/oai:opensiuc.lib.siu.edu:theses-3882 |
| Date | 01 September 2021 |
| Creators | Pattnaik, Abhijeet |
| Publisher | OpenSIUC |
| Source Sets | Southern Illinois University Carbondale |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Theses |
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