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Design and Analysis of Dynamic Thermal Management in Chip Multiprocessors (CMPs)

Chip Multiprocessors (CMPs) have been prevailing in the modern microprocessor
market. As the significant heat is converted by the ever-increasing power density and
current leakage, the raised operating temperature in a chip has already threatened
the system?s reliability and led the thermal control to be one of the most important
issues needed to be addressed immediately in chip designs. Due to the cost and
complexity of designing thermal packaging, many Dynamic Thermal Management
(DTM) schemes have been widely adopted in modern processors.
In this study, we focus on developing a simple and accurate thermal model,
which provides a scheduling decision for running tasks. And we show how to design
an efficient DTM scheme with negligible performance overhead. First, we propose an
efficient DTM scheme for multimedia applications that tackles the thermal control
problem in a unified manner. A DTM scheme for multimedia applications makes soft
realtime scheduling decisions based on statistical characteristics of multimedia applications.
Specifically, we model application execution characteristics as the probability
distribution of the number of cycles required to decode frames. Our DTM scheme
for multimedia applications has been implemented on Linux in two mobile processors
providing variable clock frequencies in an Intel Pentium-M processor and an Intel Atom processor. In order to evaluate the performance of the proposed DTM scheme,
we exploit two major codecs, MPEG-4 and H.264/AVC based on various frame resolutions.
Our results show that our DTM scheme for multimedia applications lowers
the overall temperature by 4 degrees C and the peak temperature by 6 degrees C (up to 10 degrees C),
while maintaining frame drop ratio under 5% compared to existing DTM schemes
for multimedia applications. Second, we propose a lightweight online workload estimation
using the cumulative distribution function and architectural information via
Performance Monitoring Counters (PMC) to observe the processes dynamic workload
behaviors. We also present an accurate thermal model for CMP architectures to analyze
the thermal correlation effects by profiling the thermal impacts from neighboring
cores under the specific workload. Hence, according to the estimated workload characteristics
and thermal correlation effects, we can estimate the future temperature of
each core more accurately.
We implement a DTM scheme considering workload characteristics and thermal
correlation effects on real machines, an Intel Quad-Core Q6600 system and Dell
PowerEdge 2950 (dual Intel Xeon E5310 Quad-Core) system, running applications
ranging from multimedia applications to several benchmarks. Experiments results
show that our DTM scheme reduces the peak temperature by 8% with 0.54% performance
overhead compared to Linux Standard Scheduler, while existing DTM schemes
reduce peak temperature by 4% with up to 50% performance overhead.

Identiferoai:union.ndltd.org:tamu.edu/oai:repository.tamu.edu:1969.1/ETD-TAMU-2009-12-7596
Date2009 December 1900
CreatorsYeo, In Choon
ContributorsKim, Eun Jung
Source SetsTexas A and M University
Languageen_US
Detected LanguageEnglish
TypeBook, Thesis, Electronic Dissertation, text
Formatapplication/pdf

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