With advancing technology, Chip Multi-processor (CMP) architectures have
emerged as a viable solution for designing processors. Networks-On-Chip (NOCs)
provide a scalable communication method for CMP architectures with increasing
numbers of cores. Although there has been significant research on NOC designs for
unicast traffic, the research on the multicast router design is still in its infant stage.
Considering that one-to-many (multicast) and one-to-all (broadcast) traffic are more
common in CMP applications, it is important to design a router providing efficient
multicasting.
In this thesis, a lookahead multicast routing algorithm with limited area overhead
is proposed. This lookahead algorithm reduces network latency by removing the
need for a separate routing computation (RC) stage. An efficient area optimization
technique is put forward to achieve minimal area overhead for the lookahead RC
stage. Also, a novel compression scheme is proposed for multicast packet headers to
alleviate their big overhead in large networks. Comprehensive simulation results show
that with the new route computation logic design and area overhead optimization,
providing lookahead routing in the multicast router only costs less than 20 percent area
overhead and this percentage keeps decreasing with larger network sizes. Compared
with the basic lookahead routing design, our design can save area by over 50 percent. With
header compression and lookahead multicast routing, the network performance can be improved on an average by 22 percent for a (16 x 16) network.
| Identifer | oai:union.ndltd.org:tamu.edu/oai:repository.tamu.edu:1969.1/ETD-TAMU-2010-08-8319 |
| Date | 2010 August 1900 |
| Creators | Kumar, Poornachandran |
| Contributors | Kim, Eun J., Choi, Seong G. |
| Source Sets | Texas A and M University |
| Language | en_US |
| Detected Language | English |
| Type | thesis, text |
| Format | application/pdf |
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