Fault diagnosis plays an important role in improving the circuit design process and the
manufacturing yield. With the increasing number of gates in modern circuits, determining
the source of failure in a defective circuit is becoming more and more challenging.
In this research, we present an efficient effect-cause diagnosis framework for
combinational VLSI circuits. The framework consists of three stages to obtain an accurate
and reasonably precise diagnosis. First, an improved critical path tracing algorithm is
proposed to identify an initial suspect list by backtracing from faulty primary outputs
toward primary inputs. Compared to the traditional critical path tracing approach, our
algorithm is faster and exact. Second, a novel probabilistic ranking model is applied to
rank the suspects so that the most suspicious one will be ranked at or near the top. Several
fast filtering methods are used to prune unrelated suspects. Finally, to refine the diagnosis,
fault simulation is performed on the top suspect nets using several common fault models.
The difference between the observed faulty behavior and the simulated behavior is used to rank each suspect. Experimental results on ISCAS85 benchmark circuits show that this
diagnosis approach is efficient both in terms of memory space and CPU time and the
diagnosis results are accurate and reasonably precise.
| Identifer | oai:union.ndltd.org:tamu.edu/oai:repository.tamu.edu:1969.1/ETD-TAMU-2442 |
| Date | 15 May 2009 |
| Creators | Wu, Lei |
| Contributors | Walker, Duncan M. |
| Source Sets | Texas A and M University |
| Language | en_US |
| Detected Language | English |
| Type | Book, Thesis, Electronic Dissertation, text |
| Format | electronic, application/pdf, born digital |
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