Return to search

Auxiliary circuit assisted soft switching techniques and their application to power converters

The need to incorporate significant improvements in power supplies is driven by
customer demands, industry requirements and regulatory standards. For reduction in size
and weight, it is imperative to process the power at a higher switching frequency. High
frequency processing of power requires soft switching techniques to reduce the switching
losses. Many soft switching techniques are reported in the literature to enhance the high
frequency operation of power supplies. This thesis proposes novel high frequency,
auxiliary circuit assisted, (a) soft-switched boost converters and their application to DC-to-
DC converters and AC-to-DC front-end power factor corrected converters; and (b)
zero-voltage switching (ZVS) dc link DC-to-AC inverters.
In auxiliary circuit assisted soft transition converters, the auxiliary circuit processes
the power during switching transitions, creating a soft transition path. In most of the
proposed converters in the literature, the auxiliary circuit suffers from severe switching
losses and switching stress. Discontinuous current operation of the auxiliary circuit
results in parasitic oscillations between the switch capacitance and the resonant inductors
increasing the stress on the devices. A zero-current switching (ZCS) auxiliary circuit and
ZVS auxiliary circuit are proposed in this thesis to achieve soft transitions for the main
circuit.
A ZCS auxiliary circuit assisted soft transition boost converter is proposed. Operating
intervals of the proposed technique in various intervals of operation are analyzed. Design
constraints and considerations are discussed. A 300 W dc-to-dc boost converter and a
600 W, ac-to-dc power factor correction front-end boost converter prototype models are
built in the laboratory. The experimental results confirm the theory. The resonant
inductor used in the auxiliary circuit is coupled weakly to the boost inductor. Although parasitic oscillations are reduced due to the coupling, they are not completely eliminated. Hence, RC snubbers are required to suppress the oscillations.
A ZVS auxiliary circuit assisted soft transition boost converter is also presented.
Operating intervals of the proposed converter in various intervals of operation are
analyzed. As all the parasitic elements in the circuit are accounted, parasitic oscillations are eliminated. A 300 W dc-to-dc converter operating at 250 kHz is built in the
laboratory to verify the theory. A modified gating scheme to utilize the soft switching
auxiliary circuit in the main power processing is also proposed. A 600 W, 100 kHz,
380 V dc, operating with universal input line voltage, ac-to-dc power factor corrected
(PFC) boost converter is built using the proposed technique with modified gating
algorithm.
Large signal analysis to analyze the soft switching characteristics of the proposed
technique during load and input voltage transients is also presented. PSPICE simulation
results are presented to verify the theory. The proposed converter maintains soft
switching during load and input voltage transients. The proposed auxiliary network is
also extended to a family of pulse width modulated (PWM) converters. A two-switch soft
switching boost converter is derived from the proposed converter. By integrating the
proposed auxiliary network with a full bridge inverter, a ZVS dc link voltage source
inverter (VSI) is obtained. Operating intervals of the proposed inverter in various
intervals of operation for the forward power flow and reverse power flow are presented.
A modified unipolar switching scheme to achieve ZVS during reverse power flow is also
presented. The voltage stress on the VSI is clamped to the dc bus voltage in the proposed
converter. The conduction losses are reduced as compared to other soft switching
converters in the literature. As the proposed technique requires synchronized PWM
operation, sine-ramp modulated PWM signals are used. Experimental results from a 120
V, 60 Hz, 300 VA, single phase VSI switching at 50 kHz are presented to verify the
theory. / Graduate

Identiferoai:union.ndltd.org:uvic.ca/oai:dspace.library.uvic.ca:1828/8972
Date12 January 2018
CreatorsGurunathan, Ranganathan
ContributorsBhat, Ashoka Krishna Sarpangal
Source SetsUniversity of Victoria
LanguageEnglish, English
Detected LanguageEnglish
TypeThesis
Formatapplication/pdf
RightsAvailable to the World Wide Web

Page generated in 0.0022 seconds