隨著半導體工藝技術的不斷進步 (technology scaling) ，更多的設計資源不得不用於確保集成電路的時序正確性。這種“面向最壞情況(worstcase-oriented) 的芯片設計方法導致了悲觀保守的芯片設計方案，增加了性能及功耗開銷，減少了工藝進步帶來的效益。 / “優於最壞情況(better-than-worst-case) 的芯片設計方法允許犧牲一定的芯片可靠性 (reliability) 來提高性能以及降低功耗，從而提高計算的能量效率 (energy efficiency) 。“優於最壞情況設計方法的核心思想在於放松對芯片可靠性的硬性需求。既然時序錯誤 (timing error) 在關鍵路徑中的發生頻率並不高，我們可以允許錯誤發生，從而節約用於防止錯誤發生所需要的高額開銷。而當錯誤發生時，再利用錯誤檢測和更正方法(error detection and correction) 來消除錯誤造成的影響。這種無須保證計算過程永遠正確無誤的方法通常被稱作“ 時序推測 (timing speculation) 。然而，不幸的是，由於傳統的“面向最壞情況的設計方法往往導致芯片中存在所謂的“關鍵路徑壁壘(wall of critical paths) ，時序推測技術的有效性在一定程度上受限。 / 為了解決上述問題，我們首先研究了時序推測技術的前提與前景，也就是研究了如何估計時序推測技術能夠帶來的最小和最大效益。此外，我們也研究了時序推測芯片 (timing-speculative circuit) 中的若幹設計優化問題。首先，由於引入時序推測技術能夠提高多電壓 (multi-supply voltage)技術的靈活性，我們闡述了時序推測芯片中的多電壓設計問題，並創造性地提出了一種基於動態規劃 (dynamic programming) 的算法來解決這個問題。此外，我們提出了時序推測芯片中的時鐘差異規劃 (clock skew scheduling) 問題。在考慮了時序錯誤率 (timing error rate) 等因素的影響後，我們設計了新穎有效的方法來解決該問題。最後，鑒於工藝差異(process variation) 和老化效應 (wearout effect) 對芯片時序的影響，而且這種影響很難在設計階段被消除，我們提出了一種實時的時序差異調整(clock skew tuning) 架構。利用精心設計的硬件結構，我們可以實時地收集時序錯誤的信息，相應地調整時鐘差異，從而極大地減弱了時序不確定性對芯片性能的影響。 / As circuit non-idealities inevitably worsen with technology scaling, more design resource has to be incorporated to ensure integrated circuit (IC) timing correctness. Such worst-case-oriented design methodology results in pessimistic designs with considerable power and performance overheads, lessening the benefits provided by technology scaling. / Better-than-worst-case (BTWC) design methodology that allows reliability to be traded off against power and performance was proposed to dramatically improve the computation energy-efficiency. The basic idea behind BTWC design methodology is that, since circuit non-idealities mainly manifest themselves as infrequent timing errors on critical paths of the circuit, we can over-clock operating frequency and/or over-scale supply voltage of the chip to a critical point, where timing errors occur, and achieve error-resilient computations by performing timing error detection and correction. This approach is generally referred to as timing speculation, with which it is not necessary to guarantee “always correct operations. Unfortunately, there is usually a “wall of critical paths in the final implementation of a circuit caused by conventional worst-case-oriented design methodology, suggesting that, given a fixed circuit design, the effectiveness of timing speculation is limited by a fixed threshold beyond which the circuit performance/energy efficiency will drop significantly. / To address the above problem, this thesis first proposes to study the premises and prospects of timing speculation by analyzing the minimum and maximum potential benefits that are achievable by timing speculation techniques. After answering the question posed by the conflict between conventional techniques and timing speculation, this thesis investigates multiple design and optimization problems in timing-speculative circuits. Firstly, as introducing timing speculation capability into circuits can naturally extend the flexibility of multi-supply voltage (MSV) designs to a new horizon, this thesis formulates the MSV design problem for timing-speculative circuits and develops a novel algorithm based on dynamic programming to solve it. Secondly, this thesis develops a general formulation of clock skew scheduling (CSS) problem for timing-speculative circuits, wherein timing error rate and its corresponding impact are explicitly considered, and proposes novel algorithms to tackle this problem. Finally, considering the impact of timing uncertainties caused by process variation and wearout effects, which is very difficult to be modeled and addressed at design stage, this thesis also develops a novel online clock skew tuning framework for timing-speculative circuits. By utilizing an elaborately-designed hardware architecture to collect timing error information and tune clock skews at runtime, variation effects can be effectively mitigated. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Ye, Rong. / Thesis (Ph.D.) Chinese University of Hong Kong, 2014. / Includes bibliographical references (leaves 131-142). / Abstracts also in Chinese.

Asynchronous circuits are usually applied for the communications between multiple clock-domain blocks in some SoCs. According to application-specific traffic, efficiently allocating reasonable buffers in an asynchronous NoC router can avoid the waste or shortage of buffer resource. The method of application-specific asynchronous First-In-First-Out buffer allocation can reduce the silicon area and the power consumption to improve the network latency. According to given traffic pattems, the save of area buffer of our buffer-allocation method can be up to near 30% and the latency is reduced a little at same time. / Bypass schemes is efficient to reduce the average propagation cycles in NoCs. We propose novel lookahead bypass scheme to improve the network latency. The lookahead bypass router is implemented and evaluations of valious configurations are compared, where the proposed architecture significantly improves the packet latency up to 32.1 % over a baseline router. These prove that the router can reduce the average network latency and power consumption, and decreases the reliance on large buffers and virtual channels. Furthermore, the application-specific short-circuit channel is introduced to add some short cuts in a router to bypass the crossbar switch. It can provide additional internal channels to bypass the crossbar and increase the total probability of lookahead bypass. Therefore, the latency can be further reduced. And the throughput can be increased in some applications. / Multicast is preferred in parallel computers. It is an inherent fault of network-on-chip as compared with competitor bus architecture. Software method is a conventional method to implement multicast, but there is a large overhead in latency. The latency overhead of a 4-flit multicast packet achieves 6∼7 times as compared with tree-based or path-based hardware multicast. Hardware multicast support is necessary in these applications. A group-based hardware multicast method is desclibed and estimated in this thesis. Quality of service is also introduced to speed up multicast packets. / On-chip communication infrastructures are inunensely important today. As silicon technology allows more than one billion of transistors in a single piece of silicon, the system-on-chip (SoC) circuits can contain already a large number of processing elements (PEs). Therefore, the Networks-on-Chip (NoCs) are a generally accepted concept to solve the problems such as the scalability and throughput limitation, and physical design problems inherent in dedicated links and shared buses. However, the state-of-the-art on-chip network suffers from latency overhead due to the additional network as compared with dedicated wire connection. According to the different application enviromnents, there are different low-latency technologies for networks-on-chip. This thesis proposes some methods for low-latency NoCs design to relax the latency overhead, which include application-specific asynchronous buffer allocation, hardware multicast support, lookahead bypass scheme and short-circuit crossbar channel optimization. / Xin, Ling. / Adviser: Chui-Sing Choy. / Source: Dissertation Abstracts International, Volume: 73-03, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references (leaves 157-164). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

Refurbishments have different features in comparison with new build projects. This refers mainly to the fact that they are carried out in an existing asset that might remain in operation. Such characteristics increase the complexity inherent to construction settings. Yet, studies indicate that mainstream practices, that are not capable of dealing with complex projects, are predominantly used for managing production. Prior research suggests that the use of such an incompatible management approach is likely to lead to poor performance. Indeed, problems in managing refurbishments have been identified in several countries. Despite this troubling scenario, the management of refurbishment works has not been properly addressed in the current research agenda. There are numerous studies related to the broad refurbishment area, but only a small number refer to the way those projects are managed. Moreover, the majority of studies about this topic have not been based on a proper theory of production. Clearly, there is a gap in this research domain. In order to fill such a gap, this research aims to developing a method for construction management in refurbishment projects, with the purpose of improving production performance, by indicating appropriate approaches of production control. The method comprises a conceptual model of refurbishments, a framework for project characterisation, and a list of managerial solutions, grounded on a robust theory of production and suited to the context of refurbishments. The constructive research approach is adopted in the study. Two rounds of empirical studies were conducted throughout the research. Firstly, two studies were carried out to obtain a deeper understanding of the topic investigated and to develop the initial version of the method. Secondly, a study was conducted to implement and refine the artefact. Thirdly, a focus group was organised to evaluate the utility of the method, to refine it, and to examine its scope of applicability. The main theoretical contributions of the study, embrace the conceptual model of refurbishments to support effective construction management, the framework having project dimensions for helping managers to cope with the management of complexity innate to refurbishments, and the framework of managerial solutions for production management. In practical terms, the study showed that the application of the method assisted managers in choosing suitable practices for managing construction in a retrofit project and contributed to enhance project performance. Moreover, it is contended that the method can be used to help organisations to get started on lean in refurbishment projects.

If the UK is to avoid the catastrophic impacts of climate change a low-carbon transition (LCT) must be achieved, whereby our energy infrastructure and economy dramatically reduce carbon-dioxide emissions. The thesis argues that the UK construction sector is key to the success of the LCT and proposes some longer-term skills forecasts to assess whether future supply will meet demand. The thesis uses secondary data to examine features of the UK construction sector which make it essential to achieving the LCT by building and installing the low-carbon infrastructure. Existing construction skills forecasting methodologies are reviewed to determine the required properties for the long-term projection. A novel model where underlying activity, technical change and institutional change co-evolve is developed to frame forecasts of the demand and supply of skills necessary for the LCT and identify if any potential skills shortages could disrupt it. To predict long-term UK growth patterns a new approach - Multi-channel Singular Spectral Analysis - is employed, using educational and demographic forecasts and incorporating business cycles. Technical change is explored using four Government produced 2050 pathways, each proposing a differing bundle of technologies to deliver the LCT. The skills demand for each pathway is then forecast and evaluated. Additional forecasts cover other potential demands and the impact of institutions. In particular, the additional impacts of adaptation measures and the possibility of building more dwellings to meet growing demand are evaluated. The results suggest that given appropriate policies and if the impacts of recessions are minimalised, and the number of new construction workers continues to grow, shortages can be avoided. UK skills policy and training, currently based on an employer-led philosophy, is evaluated to determine if it can provide a timely response to the increased demand for construction skills or whether a more proactive approach is required. The thesis argues that, if a more proactive engagement by the construction skills institutions and policy makers is adopted, the supply of skills could be sufficient to achieve the LCT. However, the higher levels of adaptation measures combined with building sufficient dwelling to meet demand could produce destabilising addition demand on the construction sector leading to problems with the LCT.

随着无线通信的蓬勃发展，新的通信标准不断出现，频谱利用率和数据传输速率提高的同时，传输信号的带宽和均峰比也不断增加。此外，多种通信标准共存的现状要求收发机能够在多个载波频率，高效率地传输不同格式的信号。因此，宽带运行和高效的放大高均峰比信号成为了基站功率放大器设计的基本要求。 / Doherty 功率放大器结构简单，增加效率的同时能保持中等线性度，故而受到了广泛关注。本文囊括了三个有关增加Doherty 放大器工作带宽、延展高效率区或提高功率利用因子的创新设计。 / 第一个设计中，复数合路阻抗被用于扩宽Doherty 放大器的高效率区。关于动态阻抗范围，电流比因子和漏极效率的理论分析说明，复数合路阻抗可以当作新的自由度来增加放大器的高效率区。为了验证有关理论，以2GHz 为工作频点，我们使用了相同的基于GaN 工艺的晶体管，分别设计了使用复数合路阻抗和纯实数合路阻抗的Doherty 放大器。连续波测试结果显示，使用复数合路阻抗的Dohety 放大器能够提高9.1dB 的输出回退范围，比基于纯实数合路阻抗的传统设计要高3.6dB。此外，使用单载波、均峰比9.6dB 的WCDMA 信号的测试显示，基于复数合路阻抗的设计在输出功率为33.2dBm 时，其平均漏极效率高达57.4%。 / 第二个设计中使用了随频率变化的复数合路阻抗，通过控制漏极电流，来同时增加Doherty 放大器的工作带宽和高效率区。为了验证有关理论，我们设计了输出功率42dBm、工作带宽1.8-2.2GHz、输出回退区9dB 的Doherty 放大器。连续波测试结果显示，在8.5dB 回退点处，该设计在8.5dB 回退点和饱和输出点的漏极效率分别高达55-59%和69-73%。使用单载波、均峰比9.6dB 的WCDMA 信号的测试显示，该设计在输出功率为33.5dBm 时，其平均漏极效率高达53-58%，邻道抑制比也能保持在-30dBc。 / 最后一个设计中，一种在辅助支路加入变换器的Doherty 结构被用于宽带放大。理论分析显示了该结构能够增加功率利用因子，并提供宽带Doherty 特性。为了验证有关理论，我们设计了输出功率20W、工作带宽1.6-2.4GHz、功率利用因子得到改善的Doherty 放大器。连续波测试结果显示，该设计的功率利用因子高达0.94，所有频点均可得到良好的Doherty 效率特性，该设计在6dB回退点和饱和输出点的漏极效率分别高达55-64%和68-76%。在2GHz 处，使用单载波、均峰比6.6dB 的WCDMA 信号的测试显示，该设计在输出功率为37dBm时，其平均漏极效率高达56%，邻道抑制比低于-37dBc。 / As modern communication system demands higher spectrum efficiency and data rate, new communication standard using complex modulation scheme has emerged and led to transmitting signal with ever-increasing Peak-to-Average Power Ratio (PAPR). Moreover, the co-existence of different standards requires RF transceivers to support signal transmission at multiple carrier frequencies. Therefore, wideband operation and efficient amplification of high PAPR signal are prime requirements for base-station PA design. / For efficiency enhancement, the Doherty Power Amplifier (DPA) [1] has been regarded as the most popular approach due to its circuit simplicity and moderate linearity. Three innovative DPA design techniques relating to the enhancement of operating bandwidth, high efficiency range and power utilization factor (PUF) are proposed in this work. / In the first demonstration, a novel DPA configuration with Complex Combining Load (CCL) is presented to extend the high efficiency range of the amplifier. Theoretical analysis of dynamic load span, current ratio and drain efficiency reveals that complex combining load can offer a new degree of freedom to boost the Output Back-off (OBO) of DPA. For verification, a 2GHz, equal-cell, GaN HEMT-based DPA is simulated, prototyped and measured with both complex and resistive combining loads. Under Continuous Wave (CW) excitation, measurement results show that the CCL DPA can attain an OBO of 9.1 dB which is 3.6 dB higher than that of the RCL design. In addition, by the use of single-carrier WCDMA signal with PAPR of 9.6 dB and at an average output power of 33.2 dBm, the CCL design is found to deliver an average drain efficiency of 57.4%. / The second design presents a novel technique to extend the bandwidth and efficiency range of DPA by the adoption of frequency-varying Complex Combining Load and proper input current control strategy. For verification, a 42 dBm, 1.8-2.2 GHz DPA with OBO of 8.5 dB was designed, built and characterized. Under CW stimulation, a back-off efficiency (8.5 dB) of 55-59% and saturation efficiency of 69-73% were observed over the entire bandwidth. With single carrier WCDMA signal excitation (PAPR of 9.6 dB), an average drain efficiency of 53-58% was obtained at 33.5 dBm average output power and Adjacent Channel Leakage Power Ratio (ACLR) of around -30 dBc. / In the last technique, a novel DPA configuration with auxiliary transformer is presented for broadband operation. Theoretical analysis reveals that the presented design can offer enhanced PUF and wideband Doherty behavior. Based on the proposed theory, a 1.6-2.4 GHz, 20 W DPA with improved PUF is designed, simulated and measured. Under CW excitation, measurement results indicate that the presented DPA can achieve a PUF of 0.94, good Doherty behavior over the entire frequency band with a 6 dB back-off efficiency of 55-64% and saturated efficiency of 68-76%. In addition, by the use of single-carrier WCDMA signal (centered at 2 GHz) with PAPR of 6.6 dB and at an average output power of 37 dBm, an average drain efficiency of 56% is obtained with ACLR of better than -37 dBc. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Fang, Xiaohu. / Thesis (Ph.D.) Chinese University of Hong Kong, 2015. / Includes bibliographical references. / Abstracts also in Chinese.

Bakgrund: Bygg- och anläggningsbranschen står inför en stor utmaning med klimatreducerande åtgärder mot en klimatneutral byggprocess tills 2045. Denna studie är en uppföljning av ett exploateringsprojekt i Skellefteå Kommun med Skanska Sverige AB som entreprenör. Projektet har fått utmärkelse för årets hållbara infrastrukturprojekt samt mottagit Skanskas interna hållbarhetspris. Projektet har prisats för att ha reducerat den förväntade klimatpåverkan från masshanteringen med 93%. Nyckelord: Masshantering, Klimatkalkyl Syfte: Syftet med studien är att ta tillvara på lärdomar från det lyckade projektet Västra Eriksberg och finna nyckelfaktorer som har lett till det goda resultatet. Studien utreder också hur klimatkalkyl ska kunna användas som ett stöd i produktionen. Frågeställningar: -          Vilka nyckelfaktorer i projekt möjliggör/försvårar hållbar ”Masshantering”?   -          Kan produktionsstyrningen förbättras med hjälp av klimatkalkyl? Metod: Studien är utförd som en fallstudie. Intervjuer har utförts med nyckelpersoner kring Västra Eriksberg. Dokumentstudien har innefattat en undersökning av Skanskas produktionsverktyg. Slutsats: Det lyckade resultatet på Västra Eriksberg går att härleda till väl utförd projektledning tillsammans med en väl fungerande samverkan mellan beställare och entreprenör. Detta har tillsammans med gynnsamma geotekniska förhållanden, möjlighet till utrymme för upplag, närliggande verksamheter med behov av massor från projektet lett till ett väldigt gott resultat. För att klimatkalkylen skall kunna fungera som ett verktyg i produktionsstyrningen måste branschens fokus flyttas från den ekonomiska vinningen och låta klimatfrågan ta större plats. Vidare måste kalkylen få en närmare koppling till det verkliga utförandet och vara mer representativ för de arbete som utförs, detta kommer kräva en teknisk utveckling av produktionsverktyget för att göra arbetet med klimatkalkyl mer kvalitetssäkert och användarvänligt.

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Integrating many processing elements (PE) in a single chip is inevitable as silicon technology allows more than one billion of transistors in a single piece of silicon. Networks-on-Chip (NoCs) has been proposed as a scalable solution to both increasing bandwidth requirements and physical design problems for multi-PE chips. However, as multi-PE chips drive the design focus to shift from the computation-centric to communication-centric, area and power costs consumed by communication has become comparable to what computation consumes. / The second direction is to reduce hop counts of packets when they travel from sources to destinations, and thus to reduce power consumption of NoCs. The reduction of hop counts is realized by using a recently proposed express virtual channel (EVC) technique to virtually bypass intermediate routers. We study the EVC technique in two domains. The first domain is to present a high-level, application-specific methodology to improve power efficiency of EVC paths early in the design stage. The methodology includes three steps. Firstly, aggregate communication loads between routers are calculated. Secondly, an energy reduction model and an energy overhead model are developed. Finally, energy savings of all possible EVCs path are calculated and a greedy algorithm is applied to insert EVCs paths in an iterative way. / The second domain is to exploit the EVC flow control in design and implementation of low-power NoCs. We firstly present cost-efficient hardware components for both EVC source and EVC bypass routers, then propose a statistical approach to customize buffer architectures for EVC networks, then describe creative use of low-power circuit techniques such as clock gating and operand isolation for EVC routers, and finally evaluate EVC NoCs through detailed ASIC implementations. Results show that EVC NoCs can save up to 34.26% of power compared to baseline NoCs. / This thesis tackles design and implementation of cost-efficient NoCs along two orthogonal directions. The first direction is to reduce area and power costs of a single virtual channel router. Through ASIC implementations, we find that allocator logic, including both virtual channel allocator (VA) and switch allocator (SA), consumes a large amount of costs. Based on RTL simulations for the entire NoCs, we identify great opportunities to reduce design costs of VA and then propose two low-complexity allocators: look-ahead VA and combined switch-VC allocator (SVA). Evaluations are performed for a wide range of traffic patterns and router parameters. Results show that both proposed architectures significantly reduce area and power costs of allocators without penalties on network performances. / Zhang, Min. / Source: Dissertation Abstracts International, Volume: 72-01, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references (leaves 139-145). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. Ann Arbor, MI : ProQuest Information and Learning Company, [200-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

Chung, Wing Kwong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2008. / Includes bibliographical references (leaves 97-101). / Abstracts in English and Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Related Work --- p.3 / Chapter 1.2.1 --- History of Humanoid Robots --- p.3 / Chapter 1.2.2 --- The Study of Humanoid Robots --- p.5 / Chapter 1.3 --- Thesis Overview --- p.6 / Chapter 2 --- Architecture --- p.8 / Chapter 2.1 --- Introduction --- p.8 / Chapter 2.2 --- Mechanical Design --- p.8 / Chapter 2.3 --- Hardware Platform --- p.11 / Chapter 2.4 --- Software Platform --- p.14 / Chapter 3 --- Kinematics --- p.15 / Chapter 3.1 --- Introduction --- p.15 / Chapter 3.2 --- Forward Kinematics --- p.15 / Chapter 3.2.1 --- Lower Limb --- p.17 / Chapter 3.2.2 --- Upper Limb --- p.19 / Chapter 3.3 --- Inverse Kinematics --- p.21 / Chapter 3.3.1 --- Lower Limb --- p.21 / Chapter 3.3.2 --- Upper Limb --- p.24 / Chapter 4 --- Gait Synthesis --- p.29 / Chapter 4.1 --- Introduction --- p.29 / Chapter 4.1.1 --- Difference Between Human and Robot Joints --- p.29 / Chapter 4.1.2 --- Difference Types of Gait for Humanoid Robots --- p.30 / Chapter 4.2 --- Related Works --- p.31 / Chapter 4.3 --- Gait Frame --- p.33 / Chapter 4.3.1 --- Analysis of Human Gait --- p.33 / Chapter 4.3.2 --- Gait Frame for PHR --- p.34 / Chapter 4.4 --- Gait Synthesis --- p.36 / Chapter 4.4.1 --- Mathematic Description of Bezier Curve --- p.36 / Chapter 4.4.2 --- Reasons for Using Bezier Curve for Gait Synthesis --- p.37 / Chapter 4.4.3 --- Gait Synthesis Using Bezier Curve Interpolation --- p.37 / Chapter 4.5 --- Experiments --- p.40 / Chapter 4.5.1 --- Experimental Setup --- p.40 / Chapter 4.5.2 --- Results --- p.40 / Chapter 4.6 --- Discussion --- p.43 / Chapter 4.7 --- Conclusion and Future Work --- p.44 / Chapter 5 --- Balance Algorithm for PHR --- p.45 / Chapter 5.1 --- Introduction --- p.45 / Chapter 5.2 --- Related Works --- p.45 / Chapter 5.3 --- Balance Algorithm --- p.47 / Chapter 5.4 --- Experiments --- p.51 / Chapter 5.4.1 --- Experimental Setup --- p.51 / Chapter 5.4.2 --- Results --- p.51 / Chapter 5.5 --- Discussion --- p.54 / Chapter 5.6 --- Conclusion and Future Work --- p.54 / Chapter 6 --- Human-robot Interaction System through Hand Gestures --- p.55 / Chapter 6.1 --- Introduction --- p.55 / Chapter 6.2 --- Related Works --- p.55 / Chapter 6.3 --- Flow of Hand Gesture Recognition --- p.57 / Chapter 6.4 --- Database Establishment --- p.60 / Chapter 6.4.1 --- Hand Detection and Preprocessing --- p.60 / Chapter 6.4.2 --- Extraction of Features --- p.62 / Chapter 6.4.3 --- Storage of Features --- p.68 / Chapter 6.5 --- Hand Gesture Recognition --- p.69 / Chapter 6.6 --- Experiments --- p.72 / Chapter 6.6.1 --- Experimental Setup --- p.72 / Chapter 6.6.2 --- Recognition Results --- p.73 / Chapter 6.7 --- Discussion --- p.75 / Chapter 6.8 --- Conclusion and Future Work --- p.75 / Chapter 7 --- Conclusion --- p.76 / Chapter 7.1 --- Research Summary --- p.76 / Chapter 7.2 --- Future Work --- p.78 / Chapter A --- Forward Kinematics of PHR --- p.79 / Chapter A.1 --- Lower Limb --- p.79 / Chapter A.2 --- Upper Limb --- p.82 / Chapter B --- Inverse Kinematics of PHR --- p.85 / Chapter B.1 --- Lower Limb --- p.85 / Chapter B.2 --- Upper Limb --- p.88 / Chapter C --- Zero Moment Point --- p.91 / Chapter D --- User Interface of PHR --- p.93

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