Mui Sze Wai. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2003. / Includes bibliographical references (leaves 62-65). / Abstracts in English and Chinese. / Chapter 1. --- Introduction --- p.1 / Chapter 1.1 --- Evolution of Multirate Networks --- p.2 / Chapter 1.2 --- Some Results from Previous Work --- p.2 / Chapter 1.3 --- Multirate Traffic on Benes Network --- p.5 / Chapter 1.4 --- Organization --- p.7 / Chapter 2. --- Background Knowledge on Benes Network and Path Switching --- p.8 / Chapter 2.1 --- Benes Network --- p.9 / Chapter 2.1.1 --- Construction of Large Switching Fabrics --- p.9 / Chapter 2.1.2 --- Routing in Benes Network --- p.11 / Chapter 2.1.3 --- Performance when Operated as a Large Switch Fabric --- p.13 / Chapter 2.2 --- Path Switching --- p.14 / Chapter 2.2.1 --- Basic Concept of Path Switching --- p.14 / Chapter 2.2.2 --- Capacity Allocation and Route Assignment --- p.15 / Chapter 3. --- Path Switching over Benes Network --- p.20 / Chapter 3.1 --- The Model of path-switched Benes Network --- p.21 / Chapter 3.2 --- Module-to-Module Implementation --- p.21 / Chapter 3.2.1 --- The First Stage (Input Module) --- p.22 / Chapter 3.2.2 --- The Middle Stage (Central Module) --- p.23 / Chapter 3.2.3 --- The Last Stage (Output Module) --- p.24 / Chapter 3.3 --- Port-to-Port Implementation --- p.24 / Chapter 3.3.1 --- Uniform Traffic --- p.25 / Chapter 3.3.2 --- Mult irate Traffic --- p.26 / Chapter 3.4 --- Closing remarks --- p.29 / Chapter 4. --- Performance Analysis --- p.31 / Chapter 4.1 --- Traffic Constraints and Perform- ance Guarantees --- p.32 / Chapter 4.1.1 --- Arrival Curve and Service Curve --- p.33 / Chapter 4.1.2 --- Delay Bound and Backlog Bound --- p.36 / Chapter 4.2 --- Service Guarantees --- p.39 / Chapter 4.3 --- Deterministic Bounds --- p.42 / Chapter 4.3.1 --- Delay --- p.42 / Chapter 4.3.2 --- Backlog at Input Module --- p.44 / Chapter 4.3.3 --- Backlog at Output Module --- p.47 / Chapter 5. --- Simulation Results --- p.52 / Chapter 5.1 --- Uniform Traffic --- p.53 / Chapter 5.2 --- Multirate Traffic --- p.55 / Chapter 6. --- Conclusions and Future Research --- p.59 / Chapter 6.1 --- Suggestions for future research --- p.61 / Bibliography --- p.62

by Man Wai-Hung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2003. / Includes bibliographical references (leaves 62-66). / Abstracts in English and Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- General Types of Switch Architecture --- p.2 / Chapter 1.1.1 --- Input-Buffered Switch --- p.2 / Chapter 1.1.2 --- Output-Buffered Switch --- p.4 / Chapter 1.1.3 --- Crossbar-Based Switch --- p.4 / Chapter 1.1.4 --- Shared Buffer Memory Switch --- p.5 / Chapter 1.2 --- From Clos Network to Cross-path Switch --- p.6 / Chapter 1.3 --- Motivation and Organization --- p.12 / Chapter 2 --- Route Reconfiguration in Clos Network --- p.14 / Chapter 2.1 --- Connection Matrix in Clos Network --- p.15 / Chapter 2.2 --- Rearranging Central Modules in Clos Network --- p.18 / Chapter 2.3 --- Changing the Connection Matrix --- p.20 / Chapter 2.4 --- One Step Route Reconfiguration --- p.21 / Chapter 2.5 --- Closing Remarks --- p.25 / Chapter 3. --- Frame-Based Reconfiguration Scheme in Cross-Path Switch --- p.26 / Chapter 3.1 --- Route Assignment in Cross-Path Switch --- p.27 / Chapter 3.1.1 --- Requirement Matrix and Capacity Matrix --- p.27 / Chapter 3.1.2 --- Allocation Vector --- p.29 / Chapter 3.2 --- Progress Tracing in Cross-Path Switch --- p.30 / Chapter 3.3 --- Implementing Frame-Based Reconfiguration --- p.32 / Chapter 3.3.1 --- Recognizing Receiver Virtual Path --- p.33 / Chapter 3.3.2 --- Finding Donor Virtual Path --- p.34 / Chapter 3.4 --- Simulation Results --- p.36 / Chapter 3.4.1 --- Fixed Requirement Matrix --- p.36 / Chapter 3.4.2 --- Time-Varying Requirement Matrix --- p.38 / Chapter 3.5 --- Unfavourable Reconfigurations --- p.39 / Chapter 3.6 --- Closing Remarks --- p.41 / Chapter 4. --- Performance and Delay Tradeoff in Frame-Based Reconfiguration Scheme --- p.43 / Chapter 4.1 --- Service Curve and Cross-Path Switch --- p.44 / Chapter 4.2 --- Service Curve of Cross-Path Switch under Reconfiguration --- p.45 / Chapter 4.3 --- Impact of Reconfiguration Algorithms to Maximum Delay Increase --- p.48 / Chapter 4.4 --- Numerical Example --- p.56 / Chapter 4.5 --- Closing Remarks --- p.57 / Chapter 5. --- Conclusions and Future Researches --- p.59 / Chapter 5.1 --- Suggestions for Future Researches --- p.60 / Bibliography --- p.62

Ho, Po Yee. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 77-81). / Abstracts in English and Chinese. / Acknowledgements --- p.i / Abstract --- p.ii / 摘要 --- p.iii / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Background and Related Work --- p.4 / Chapter 2.1 --- Link/Path Capacity --- p.4 / Chapter 2.2 --- Unutilized Bandwidth --- p.5 / Chapter 2.3 --- Achievable Bandwidth --- p.5 / Chapter Chapter 3 --- Measurement Methodology --- p.7 / Chapter 3.1 --- PlanetLab Measurement --- p.8 / Chapter 3.2 --- FTP Measurement --- p.10 / Chapter Chapter 4 --- Analysis of Measurement Data --- p.12 / Chapter 4.1 --- Per-Flow Achievable Bandwidth --- p.13 / Chapter 4.2 --- Inter-Flow Correlation --- p.14 / Chapter 4.3 --- Intra-Flow Temporal Correlation --- p.16 / Chapter 4.4 --- Intra-Flow Bandwidth Variation --- p.18 / Chapter 4.5 --- Predictability of Bandwidth Properties --- p.22 / Chapter 4.6 --- Long-term Flow Properties --- p.26 / Chapter Chapter 5 --- A Mathematical Framework --- p.28 / Chapter 5.1 --- Bandwidth Variations --- p.28 / Chapter 5.2 --- Bandwidth Predictability --- p.31 / Chapter 5.3 --- Sensitivity Analysis --- p.34 / Chapter Chapter 6 --- Predictive Buffering Algorithm --- p.41 / Chapter 6.1 --- Related Work --- p.43 / Chapter 6.2 --- System Model --- p.44 / Chapter 6.3 --- Prediction Algorithm for Constant Bit-Rate Videos --- p.45 / Chapter 6.4 --- Prediction Algorithm for Variable Bit-Rate Videos --- p.46 / Chapter 6.5 --- Parameter Estimation --- p.47 / Chapter Chapter 7 --- Performance Evaluation --- p.49 / Chapter 7.1 --- Trace-Driven Simulation Setup --- p.49 / Chapter 7.2 --- Performance over CBR Videos --- p.50 / Chapter 7.2.1 --- Video Playback Performance --- p.51 / Chapter 7.2.2 --- Buffering Time --- p.57 / Chapter 7.3 --- Performance over VBR Videos --- p.61 / Chapter 7.3.1 --- Video Playback Performance --- p.62 / Chapter 7.3.2 --- Buffering Time --- p.66 / Chapter Chapter 8 --- Future Work --- p.69 / Chapter 8.1 --- Playback Rate Adaptation --- p.70 / Chapter 8.2 --- Sender Selection Algorithm --- p.71 / Chapter 8.3 --- Dynamic Flow Allocation --- p.72 / Chapter 8.4 --- Predictive Flow Allocation --- p.73 / Chapter 8.5 --- Challenge in P2P Applications --- p.74 / Chapter Chapter 9 --- Conclusion --- p.76 / Bibliography

Sun, Qifu. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2009. / Includes bibliographical references (leaves 95-99). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

Typescript (photocopy). / Digitized by Kansas Correctional Industries / Department: Computer Science.

This dissertation was motivated by the exponential growth in bandwidth capacity of the Internet, coupled with the immense growth of broadband adoption by the public. This has led to the development of a wide variety of new online services. Chief amongst the emerging applications is the delivery of multimedia contents to the end users via the network on-demand. It is the “on-demand” aspect that has led to problems which, despite the advances in hardware technology and network capacity, have hampered wide scale adoption of multimedia delivery. The focus of this dissertation was to address these problems, namely: scalability, cost-effectiveness, and network quality of service for timely presentation of multimedia contents. We proposed an architecture, which we referred to as “Delayed-Multicast”, to address the scalability problem. The new architecture introduced buffers within the network to reduce demands on core network bandwidth and server load. A feasibility study of the architecture was conducted through the use of a prototype. It was found that such a system is within reach by demonstrating the prototype using cheap, common-of-the-shelf (COTS) components, and with help of freely available system software such Linux with real-time support. The introduction of buffers within the network led to the requirement of how to minimize buffer space. We developed an optimal algorithm for allocating buffer space in a single level caching layout (i.e. only one buffer in the transmission path from the server to the end user). For the case of multi-levels network caching, we thoroughly examined different optimization problems from an algorithmic perspective. These problems included how to minimize total system memory, and minimize the maximum memory used per node. We proved that determining the optimal buffer allocation in many of these iv v cases is an NP-complete problem. Consequently, we developed heuristics to handle multi-level caching and showed through simulations that the heuristics greatly help in minimizing buffer space and network bandwidth requirement. An important aspect of the heuristics was how to handle the case when the arrival times of client requests were not known a priori. For these “online” problems we also proposed heuristics that can significantly reduce overall system resource requirements. If the cost of buffer space was also taken into account along with the cost of network bandwidth, a different optimization problem was how to minimize the total system cost. Here, we also proposed heuristics, which in simulations show that the total system cost can be significantly reduced. Besides the problems associated with resource allocation, in terms of buffer space and bandwidth, we also examined the problem of how to provision the necessary network quality of service on-demand. Most current networks rely on best-effort delivery which is ill suited for the delivery of multimedia traffic. We proposed a solution which relied on the use of a programmable network plane, that is present in many current routers, to dynamically alter the priority of flows within the network in real-time. We also demonstrated the effectiveness of the flow prioritization on an actual Nortel router. Finally, we examined the problem of how to admit and achieve fair bandwidth allocation for the end-users within a Differentiated Service (DiffServ) network. Diff- Serv is an IETF standard that aims to provide a “better than best-effort” network in a scalable manner, and is used widely, especially within the same autonomous domain for prioritization different classes of traffic. However, there are open problems on how to provide fair bandwidth allocation amongst competing flows. We proposed an edge-aware resource discovery loop, which as the name suggests, sent packets to gather information about the internal states of the core network. With this information, we proposed a price-based admission control algorithm for use within the DiffServ network that would allow fair admission, effective congestion control, and fair bandwidth allocation amongst different traffic flows.

Thesis (Ph. D.)--University of Hong Kong, 2006. / Title proper from title frame. Also available in printed format.

Thesis (Ph. D.)--University of Hong Kong, 2006. / Title proper from title frame. Also available in printed format.

<p>HMS Industrial Networks AB is in need of changing a communications solution that iscurrently based on an ASIC. This will be achieved by moving the communications solution toa FPGA with the help of the programming language VHDL. By doing this, it is possible toreduce the need for specific circuits, get a more flexible platform and thus get a cheapersolution.</p><p>This report describes a solution for how to move a network protocol from an ASIC to anFPGA. The report shows that the network slave device is working under the guidelines forthis project. This means that it is quite realistic to implement a fieldbus protocol on an FPGA,using VHDL and to maintain the same functionality as the earlier communications solution.</p>

Mobile devices are becoming more prevalent and complex. As a result, the wireless communication aspect of these devices is becoming increasingly significant. At the same time, video demands in terms of availability and quality are also on the uprise. High definition (HD) video is the standard of choice for meeting today's video demands. However, HD video is characterized by high data rates. Therefore, there is heightened interest in the 60-GHz spectrum as it is suitable for streaming uncompressed HD video. On the other hand, 802.11 wireless technology, compared to 60-GHz, is much more established and widely available and able to cater to a wide variety of devices. HD video compressed using H.264 can be wirelessly streamed via 802.11 wireless networks. However, such wireless networks are prone to packet losses, which result in degraded perceptual quality of video. It is thus important to perform error concealment in order to improve the visual quality of degraded video. Among the key techniques in performing error concealment on video compressed with H.264 is spatial motion vector recovery. This paper proposes a new spatial motion vector recovery technique (MI-WAM) that takes advantage of properly decoded motion vectors. MI-WAM and pre-existing MV recovery techniques are used to provide different corresponding macroblock candidates that compete for the best concealment of each lost macroblock in what will be referred to as competitive motion vector recovery (CMVR). / Graduation date: 2012