This thesis proposes a low-IF receiver architecture suitable for the realization of single-chip receivers. To alleviate the image-rejection requirements of the front-end filters an oversampling complex discrete-time ΔΣ ADC with a signal-transfer function that achieves a significant filtering of interfering signals is proposed. A filtering ADC reduces the complexity of the receiver by minimizing the requirements of analog filters in the IF digitization path. Discrete-time ΔΣ ADCs have precise resonant frequency and clock frequency ratios and, hence, do not require the calibration or tuning that is necessary in the case of continuous-time ΔΣ modulator implementations. This feature makes the proposed discrete- time ΔΣ ADC ideal for multistandard receiver applications.

No description available.

137 leaves : ill., (1 col.) diag., tables ; 26 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / Thesis (Ph.D.)--University of Adelaide, Dept. of Physics, 1975

Thesis (Ph.D.)--University of Tulsa, 1972. / Bibliography: leaves 135-141.

Diss. (sammanfattning) Stockholm : Karol. inst. / Härtill 6 uppsatser.

Thesis (B.A.Hons. 1973) from the Dept. of History, University of Adelaide.

Thesis (Ph.D.) -- University of Adelaide, Dept. of Physics, 1975.

Thesis (Ph.D.) -- University of Adelaide, School of Chemistry and Physics, Discipline of Physics, 2005. / "March 2005" Includes bibliographical references. Also available in a print form.

Stuttgart, Univ., Diss., 2008.

Inaug.-diss.--Würsburg. / Lebenslauf. "Literatur-verseichnis": p. 92-94.