Financial Transmission Rights (FTR) is an investment that protects the market customers from price uncertainty in the case of transmission line congestion. Pennsylvania-New Jersey-Maryland Interconnection (PJM) allows bidding of FTR's on various transmission paths. This thesis investigates quantitative methods for portfolio optimization to produce a risk-minimum portfolio of FTR's to bid. A computer model based on Security-Constrained Unit Commitment Problem and Risk-Reward Analysis is developed to simulate various operating conditions of a power system and predict the variations of power flows and corresponding electricity prices. It offers guidelines about the bidding cost and the amount of megawatts to bid for each transmission path, in order to obtain a certain profit with the corresponding minimum risk. The method for calculating the risk and reward is Markowitz Mean-Variance Analysis. The computer model also includes the LMP determination for which a MATLAB code has been developed. The model is tested on a 6-bus power system.

<p> Super Regenerative Receivers exploit more complex modulation techniques in order to achieve better bit per symbol rate. This study presents a novel 8-Phase Shift Keying (PSK) Super Regenerative Receiver operating in the 402&ndash;405 MHz, Medical Implant Communication Service (MICS) band. In the proposed architecture, the complexity of the circuit input is reduced by using an enable signal, which produces a quenching current source in the Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) circuit. Furthermore, the receiver uses a new RC-CR network to generate eight equally shifted signals and one Flip-Flop in each path to minimize the amplitude mismatch and the number of components, respectively. This receiver has been designed and simulated in 130 nm Complementary Metal Oxide Semiconductor (CMOS) process. The power consumption of the entire receiver is 119 &micro;W for the input signal of -80 dBm, at the rate of 6 Mbps, and the Energy Per Bit of 19.8 pj/b.</p>

<p> Security is an essential criterion in all industries. This project develops a Security System that includes motion detection and face recognition. Motion detection is achieved by using the PIR (Passive Infrared) sensor, and face recognition is achieved by using the SIFT (Scale Invariant Feature Transform) algorithm.</p><p> The primary hardware components used in this system are a PIR sensor, microcontroller, relay, LCD (Liquid Crystal Display), buzzer, MAX232 IC, and GSM (Global System for Mobile Communication). The system incorporates the feature extraction method, which is utilized to identify the number of objects in an image, and the proposed SIFT algorithm is used for the face recognition. These two methods, the feature extraction method and SIFT algorithm, are implemented in MATLAB. The result shows that the efficiency and the recognition time of the proposed SIFT algorithm is better than its predecessors. This system can be used for industrial, hospital, or even residential purposes.</p>

<p> Grounding of electrical power systems has and will always be one of the most essential aspects of any electrical system design. Without a proper, well designed and effective efficient grounding network personal safety is at risk, equipment protection cannot be assured, and proper system operation cannot be maintained. Because of these reasons grounding design has become well researched, with long established standards strictly dictating the construction and integration of such ground networks. However with an ever diversifying power grid generation mix, integration of new technologies has become common. The need for these diverse technologies along with their cultural and societal demand has enabled them to outrun the standards and conceptual knowledge required for their safe construction. One such area exists in the grounding design of large scale Wind Power Plants (WPP). While most generation facilities aim to reduce their landmass to the smallest possible footprint wind power plants require adequate spacing in order to optimize wind quality and power generation with construction costs. This necessitates a generation facility or power plant that can reach up to several square miles. At areas of this size and distribution, established grounding design practices become ineffective and inapplicable while current standards become insufficient due to failing assumptions. </p><p> This thesis offers an overview of grounding concepts tailored to the unique requirements of Wind Power Plants, a discussion concerning the recommended design methodology for such a network, and real world simulations of these problematic scenarios as a basis of study for WPP grounding. Currently there is very little literature and no standard or guidelines in industry for the specific challenges posed by WPP grounding. Lack of this documentation has led to debate in industry over the topic. It is hoped that this research will provide a basic WPP grounding design methodology and demonstrate the need for the further creation of a standard or guide.</p>

The effects of radiation on the operation of integrated circuits (IC) continue to take a more important role as technology feature sizes scale down, critical charge decreases, and operating frequencies increase. In space and other harsh environments, single ion strikes are more likely to affect multiple, physically-adjacent devices on a modern IC, thereby introducing formidable research problems for (1) modeling these effects and (2) designing circuits to mitigate them. While single-event transient (SET) behavior traditionally has been well characterized, single-event multiple-transients (SEMT) require a more complex and novel approach to capture reliability characteristics with tenable simulation times prior to chip manufacturing. This dissertation presents an automated method to quickly characterize modern combinational logic blocks for radiation-induced SEMT vulnerability. Radiation events are modeled based on physically-observed effects, and then integrated into an electronic design automation (EDA) functional verification flow for ease of implementation. When considering the placement of standard logic cells, SEMT modeling reveals the impact on charge sharing and diffusion, and consequently reliability of logic circuits in the presence of multiple transients. Modifications to standard cell placement are investigated, and a new EDA placement algorithm is developed and implemented to achieve reductions in SEMT-induced errors with zero cost to circuit area and minimal effects on other circuit performance characteristics.

<p> Software Defined Networks (SDNs) are an active research topic in Networking. This project proposes an approach to a load balancer with the implementation of SDN. This SDN load balancer uses the Round-Robin algorithm. The design topology consists of the SDN-switch and an Open Day Light (ODL) controller. The packet entries are kept in the flow table that are stored in the data plane. This project separates the control and data plane and regulates the controller using ODL. This separation eases the controlling of load balancers. By using this technique, the system becomes directly programmable and agile. The requests from different clients will be directed to various pre-defined servers in the Round-Robin fashion. This project successfully achieves load balancing using the SDN controller and reduces the response time as well as the latency.</p>

<p> Wireless power transfer is an emerging technology for electric and plug-in hybrid electric vehicles, addressing the power needs of these vehicle's charging systems. The current project presents a detailed technical analysis of an existing wireless charging system, and proposes a new design for a significant improvement in performance. Simulation results and comparisons between the two systems show that the proposed design will shorten the time to fully recharge a hybrid vehicle battery by 30% to 50% as compared to the existing system. </p>

<p> This project report presents a Field Programmable Gate Array (FPGA) implementation of an adaptive receiver designed and patented by Dr. Rajendra Kumar, U.S. patent 8233568, July 31, 2012. This adaptive receiver is generally used in the systems where higher order modulated signals are used for transmitting information over a fading a channel. </p><p> In communication systems, a receiver design must be reliable. Previously, the adaptive receivers made use of pilot signals in order to correct the phase of the transmitted signal. However, this system faced challenges and failed to accurately detect the higher order modulated signals. To eliminate this challenge, the adaptive receiver designed and patented by Dr. Rajendra Kumar estimates the channel fade and the phase using an estimator, phase detector, and Kalman filter that decodes the data and provides the required channel equalization without the need of any pilot symbols. </p><p> This project efficiently implements Rajendra Kumar&rsquo;s Adaptive Receiver on FPGA with reduced number of gates. Very High Speed Integrated Circuit Hardware Description Language (VHDL) codes and Xilinx ISE are used for replicating the adaptive receiver&rsquo;s circuit on Nexys 3 Spartan-6 FPGA trainer board. </p>

<p> Virtual reality (VR) is a computer generated simulation of a 3D environment. It artificially creates a sensory experience that allows the user to see the virtual environment. Live video streaming &ldquo;virtual reality&rdquo; is a new technology that would transport a scene from the real environment to people who are unable to visit in person, and experience it up close and in real-time. The experience is interactive, as the viewers have the freedom to look around and move the camera position and angle to see the real environment in any direction during the live-broadcast. In this project, a single board computer is used to capture and stream video. A custom video player converts this 2D video to virtual 3D video for VR headsets. Users can now use a smartphone with a VR headset to view, control, and enjoy live video streaming from anywhere in the world with an internet connection.</p>

<p> Pedestrian detection and counting have important application in video surveillance for entrance monitoring, customer behavior analysis, and public service management. In this thesis, we propose an accurate, reliable and fast method for pedestrian detection and counting in video surveillance. To this end, we first develop an effective method for background modeling, subtraction, update, and shadow removal. To effectively differentiate person image patches from other background patches, we develop a head-shoulder classification and detection method. A foreground mask curve analysis method is to determine the possible position of persons, and then use a SVM (Support Vector Machine) classifier with HOG (Histogram of Oriented) feature and bag of words to detect the head-shoulder of people. Based on the foreground detection and head-shoulder classification at each frame, we develop a person counting algorithm in the temporal domain to analyze the frame-level classification results. Our experiments with real-world surveillance videos demonstrate the proposed method has achieved accurate and reliable pedestrian detection and counting.</p>