The design of power electronic systems requires wide ranging expertise in complex and often tedious tasks, such as the design of the power circuit, selection of power semiconductor devices, design of the feedback loop, design of wound components, and design for Electromagnetic Compatibility (EMC). Many of the tasks rely heavily on the experience of the designer, and cannot be solved analytically. This makes the design iterative, time consuming, and heavily dependent on the designer's experience. At present, circuit simulation packages such as SPICE or SABER are used to test a design in software. Even with these tools, it is still necessary to build a prototype to verify the design, usually followed by several test-modify-retest cycles before a final design is reached. This process involves considerable decision making, which requires substantial expertise in all aspects of power electronics. This thesis investigates the use of expert system technology, one of many artificial intelligence techniques, to assist in the design of power electronic systems. Faster design times and a more efficient design are among the advantages that can be achieved using an expert system based design. In this study, Switched Mode Power Supplies have been chosen as a typical power electronic system. An expert system (developed using wxCLIPS) has been linked with a circuit simulator (SPICE), extensive databases and a graphical display system to provide a comprehensive design environment. The techniques used in the system cover all facets of the design: preliminary circuit design, component selection, circuit simulation, control loop design, and design for EMC. Extensive knowledge bases covering the various design rules are built into the expert system. The design methodology aims to give a near complete system design with an optimum configuration produced at minimum time and cost. The investigated techniques could readily be adapted to other power electronic applications, such as Uninterruptible Power Supplies and motor drives.

This thesis presents the results of an investigation of the robustness of the widely used Mandani-type fuzzy logic control systems under a wide variation of parameters of the controlled process. The measurements of the dynamic performance and system robustness of a control system were firstly defined from the engineering point of view, and the concepts of the robust space and the robustness index were introduced. The robustness of the FLC systems was investigated by analyzing the structure of the fuzzy rule base and membership functions of the input-output variables. Based on the close relation of the fuzzy rule base and the system dynamic trajectory on the phase plane, a switching line method is introduced to qualitatively analyze the dynamic performance of the SISO FLC systems. This switching line method enables the qualitative prediction of the shape and position of the robust space of the FLC controlled first order processes and second order processes. The effects of FLC parameters on system robustness were also investigated. The movements of the position and the shape of the switching line with the variation of the controller parameters were analyzed, and its relation with the system performance was reported. Three methods were proposed to improve the robustness of the FLC system. The first design method proposed was based on the switching line characteristics of the FLC system. The second method, called phase advanced FLC, was introduced to handle the control of high order processes with fuzzy algorithms. The third method was an evolutionary method based on the genetic algorithm which was used to automatically design a robust fuzzy control system, assuming the availability of the controlled process model.

The drive by the manufacturers and designers of integrated circuits towards smaller dimensions has led to ever increasing demands being placed on the vendors of semiconductor equipment. In the photolithography arena this has meant producing optical projection systems with improved resolution approaching 0.2μm and layer to layer registration to better than 50nm. In order to monitor these processes, metrology equipment must be capable of tracking changes in the above areas. Traditionally, optical techniques have been utilised for several reasons, namely their cost, high throughput and ease of use. The drive however, towards circuit dimensions which are equal to the wavelength of the illuminating light has reduced the appeal of optical tools to be used at these dimensions. The ability to get as close as possible to the theoretical limit is of benefit to the users and manufacturers of metrology equipment in that the useful life of optical metrology tools can be increased. This has been achieved by examining and implementing various new algorithms developed for the coherence probe microscope, the aim of which is to improve the measuring ability and extract more information from the complex signal that the microscope produces. Three areas have been examined, the first was the effect of a pathlength offset on the microscope, which moves the coherence region away from the focal plane of the objective lens. The results from this show a substantial improvement in the repeatability of the measurements from the bottom of trenches. The second area is that of profile extraction, in particular that of a photoresist profile after development. The ability to extract profile information from an optical tool is of great use to a lithography engineer as it negates the need to destructively cross section the sample. Thirdly, the area of general algorithms for measurement of critical dimensions has been investigated and several other schemes for measurement have been proposed.

Conventional ion selective electrodes are briefly reviewed, with particular reference to the pH sensitive glass electrode, and the benefits which might result from the application of microelectronic techniques to electrode manufacture are noted. It is shown that microelectronic 'transducers' may conveniently be classified into two general categories, described as the 'potentiometric' type and the 'field effect' type, and certain constructional and operational advantages of the former type are suggested. The theory of membrane potentials is critically reviewed and the relationship between such well known phenomena as the 'Donnan potential', the 'liquid junction potential' and the 'glass membrane potential' is discussed. A model is proposed for the operation of the 'Ion Sensitive Field Effect Transistor', (a transducer of the 'field effect' type) by drawing upon the theories of the glass electrode and the conventional 'Insulated Gate Field Effect Transistor'. The-fabrication of 'field effect' type devices is described and the results of measurements on them are reported. It is noted that a clear understanding of the mechanism and stability of solid state contacts to ion selective materials is necessary for the development of sensors of the 'potentiometric' type. To this end, an experimental structure has been devised to allow measurement of the pH sensitivity and stability of metal connected glass electrode cells. Severe problems are caused by electrical leakage effects but a satisfactory structure has been achieved and might have application in the manufacture of conventional glass membrane electrodes. The results of measurements on metal connected devices show that Nernstian pH responses are obtainable and that cell potentials are fairly stable over periods of several weeks. Improvements to the measurement techniques are required in order to investigate further the long term stability and temperature sensitivity of the devices. Suggestions are made for further research into the mechanism of the solid contact and into fabrication methods for the devices. It is expected that the method of construction developed here will be applicable to this work.

The shrinking dimensions of silicon microcircuits have reached the point where the vertical and lateral features are comparable in size. The consequence can be seen in each aspect of the manufacture of devices. The 2D layout of the physical routing becomes a convoluted maze when put into fabrication. The diminishing dimensions have focused greater attention on the edge effects since these play a proportionately greater role in the device performance. The consequences of the edge interactions can be categorised into two sections: those on the silicon surface and those on the subsequent layers. The MOS transistor is directly impacted by the silicon surface profile. A fundamental parameter is the transistor width, which until recently has received little attention. This thesis correlates the different definitions commonly used, and investigates the impact of the individual processing parameters on the surface topography and consequently on the transistor width. Different measurement techniques are used and a novel extraction process is proposed. The weakness of the current generic electrical extraction technique is exposed and recommendations made to overcome this. Further work on SEM sample preparation and processing is presented.

Carbon nanotubes (CNTs) have been chemically functionalised for electronic device applications using plasma exposure processes. Two areas of CNT device have been investigated. Firstly the conversion of the inherent p=type field effect behaviour of the CNTs to n-type field effects behaviour and secondly to control the positioning of CNTs on a substrate. To convert CNTs from p-type to n-type semiconductors, the chemically unreactive CNTs have been functionalised by exposure to fluorinated plasmas, both CF₄ and SF₆. Further functionalisation with 1,2-diaminoethane was then employed on functionalised CNTs exposed to a CF₄ plasma at low bias conditions, the purpose of the amine molecule is to donate electrons to the CNTs. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy have confirmed both the presence of fluorine and nitrogen on the CNT surface as well as the structural integrity of the CNTs. The functionalisation mechanism was seen to depend on the ionic current density and the fluorine plasma during the initial fluorine exposure stages. Electronic characterisation of the plasma fluorinated and the 1,2-diaminoethane functionalised CNTs in backgated geometry was then applied with randomly distributed CNTs on gold electrodes. The fluorinated CNTs have exhibited p-type field dependent behaviour in air, whilst the aminated CNTs have begun to show indication of n-type field dependent behaviour. The second process used molecular stamping of 2-thiolpyridine using poly(dimethylsiloxane) (PDMS) stamps; a method which allows applications for both pristine and functionalised CNTs. Molecular stamping of 2-thiolpyridine using poly(dimethylsiloxane) (PDMS) stamping techniques, have been developed to self-assemble CNTs over a substrate and onto predefined electrode structures. By optimising the concentration of 2-thiolpyridine in ethanol and using a dilute suspension of CNTs in 1,2-dichloroethane, CNTs could be self-assembled using two similar fabrication processes. The molecular stamping experiments have confirmed that altering the order of the steps within the fabrication process, to have CNTs on top of electrodes or underneath electrodes, can control the field dependent qualities of devices in a limited gate voltage range. The limiting factor to device reproducibility is the ability to produce homogeneous CNT solutions. With control over the CNT chirality and suspension it is predicted the molecular stamping methods would be a fast and reliable process for high yield CNT devices.

A systolic array is essentially a parallel processor which consists of a grid of locally-connected sub-processors which receive, process and pump out data synchronously in such a way that the patterns of data-flow to and from each processor is identical to the flow to and from the other processors. Such arrays are repetitive and modular and require little length of communication interconnection, so that they are relatively simple to design and are amenable to efficient VLSI implementation. The systolic architecture has been found suitable for implementing many of the algorithms used in the field of signal- and image-processing. A formal design method is a precisely defined method which, if followed, will yield a design satisfying a given specification. Such a method is amenable to proof that, if the method terminates, then the output design is valid. When proven correct, such methods are useful for designing equipment which is safety-critical or where a design fault discovered after manufacture would be expensive. This thesis presents a formal design method for implementing certain signal-processing and other algorithms as systolic arrays. As a necessary preliminary to the method, a calculus is defined. The basic concept, that of a 'computation', is powerful enough to express both abstract algorithms and those whose suboperations have been assigned a place and a time to execute. Computations may be composed or abstracted (by having variables hidden) or may have their variables renamed. The 'implementation' of one computation by another is defined. Using this calculus it is possible to formalise concepts like 'dependency' (of data or control) and 'system or recurrence equations', which often appear in the literature on systolic array design. The design method is then presented. It consists of four stages, pipelining of data dependencies, scheduling, pipelining of the control variables and allocation of subprocessors to the subcomputations.

Traditional expert systems technology is limited, being hard to maintain and extend to new problems. In this thesis, I propose a logical formalization for the domain of computer hardware which will enable the use of theorem proving techniques for the task of computer hardware configuration. This domain was the subject of one of the earliest knowledge based systems, XCON. Whilst XCON is cited as a successful system, it has nevertheless also been criticized for its maintenance problems. This is an important issue, as the turnover of computer hardware components is particularly changeable, the market being subject to intense competition and rapidly changing technology. My approach enables the task of configuring a computer configuration <i>c</i> from a specification <i>spec(c)</i> to be performed by synthesizing <i>c</i> as a by-product of proving the theorem exists <i>c.spec(c)</i> when <i>c</i> becomes instantiated in the course of the proof. A clean separation of the object-level, heuristic and control knowledge enbales us to guide search and aids maintenance. As well as ensuring legal configurations, by virtue of the soundness of the underlying logical theory, I have also been able to take design issues into consideration by using heuristic and control knowledge.

No description available.

Heterostructures fabricated from atomically thin crystalline layers are new materials which offer exciting possibilities for next-generation electronic and optoelectronic sensors and devices. The idea of heterostructures is not new and traditional semiconductor heterostructures have already played an important technological role in many modern electronic components. It is possible to fabricate new and exciting structures by stacking single atomic layers of different materials into heterostructures. This technology can be used to create materials and devices with a wide variety of properties. The stacking order, thickness, doping and crystal orientation play the major roles in determining the characteristics of these new materials. The experimental work for this thesis involves the electrical characterisation of several different heterostructures.i Investigation of boron nitride as an atomically thin tunnel barrier, including its homogeneity across micron sized areas. The area normalised conductance was found to depend on boron nitride thickness, changing by 1.5 decades per layer.ii Graphene-based tunnelling transistors which exhibit current modulation by external gate voltage. With boron nitride as the tunnel barrier an on-off ratio of up to 40 was acheived.iii Resonant tunnelling devices which show negative differential conductivity in their current-voltage characteristics.iv Photodetection and solar cell devices using semiconducting tungsten disulfide. The maximum external quantum efficiency observed was 0.1 A/W which was approximately constant across the visible spectrum. The enormous array of possibilities made available by this technology means that there is huge scope for further investigation with more exploratory research to make proof-of-principle functional devices for application in technology.