No description available.

This thesis reports a study of a viable way to pursue the aim of the production of ultra-shallow pn junctions for the next generation of CMOS devices (70 nm node). Particularly the ion implantation of alternative species to boron as p-type dopants has been investigated. Indium and gallium were the selected species for this purpose. Particular attention has been paid to the study of the electrical activation of the implanted layers in relation to annealing conditions and with the nature of the stalling material (crystalline or amorphous). Regarding the use of indium a further study involving the co-implant of another species (such as carbon) has been carried out. Results have been obtained using Hall effect measurements to assess the electrical properties in terms of electrical activation, Hall mobility and sheet resistance of the implanted layer. Rutherford Back Scattering has been used to evaluate the dosimetry of the samples as implanted and after thermal treatment and to obtain information about the atomic distribution of the dopant inside the layer, especially in terms of its lattice location, and of the damage induced by the bombardment. Secondary Ion Mass Spectroscopy has been used to assess the atomic profile as a function of the depth for the implanted layer and achieve information about the diffusion of the dopant during annealing. Transmission Electron Microscopy has been used to check the level of damage after the dopant implantation and to assess the residual damage after annealing. The data obtained has been compared with the output of Montecarlo simulations. The results show that a very low electrical activation is achieved when indium is used. This result, which is in agreement with the previous data reported in the literature, is due to the very low solid solubility of the species and to the deep acceptor level which is characteristic for indium. It is shown that using carbon as co-implanted species it is possible to raise the indium electrical activation. This activation enhancement is discussed to be due to three different effects that the carbon co-implant has on the indium implant. Namely, an increase of the dopant integration within the silicon matrix, the generation of a new shallower acceptor level within the bandgap and a lower degree of residual stress and damage in the re-grown crystal after annealing. Moreover, a different behaviour of the electrical characteristics as a function of the annealing conditions is shown for indium and indium-carbon co-implants. We argue that the difference is due to the evolution of the carbon atoms inside the layer when the anneal is performed. For the gallium implants the electrical activation achieved is very high (>90% of the implanted dose). By comparison with the data achieved for indium it is discussed that the higher degree of activation is due to a shallower acceptor level and, also, to a lower degree of stress induced by the presence of the dopant atom in the silicon crystal. The high density of dopant achievable suggests a correction in the Hall scattering factor to achieve more reliable data. The dependence of the electrical characteristics on the annealing conditions has been investigated. The results show that a better activation is achieved when anneals at low temperature and short time are performed. The use of pre-amorphisation allows the achievement of a higher degree of electrical activation. We discuss that this effect is due to the avoidance of dopant segregation at the end of range damage band. Regarding the as-implanted samples it is noticed that to disregard the channelling effect for a species as heavy and large as gallium can lead to a wrong calculation on the tail of the distribution, with an underestimation of the junction depth.

Metal oxides exhibit a wide range of chemical and electronic properties, making them an extremely interesting subject for numerous applications in modern electronics. The primary goal of this research is to develop metal-oxide-based electronic devices, including thin-film transistors (TFTs), resistance random-access memory (RRAM) and planar nano-devices. This research requires different processing techniques, novel device design concepts and optimisation of materials and devices. The first experiments were carried out to optimise the properties of zinc oxide (ZnO) semiconductors, in particular the carrier concentration, which determines the threshold voltage of the TFTs. Thermal annealing is one common method to affect carrier concentration and most work in the literature reports performing this process in a single-gas environment. In this work, however, annealing was carried out in a combination of air and nitrogen, and it was found that the threshold voltage could be tuned over a wide range of pre-determined values.Further experiments were undertaken to enhance the carrier mobility of ZnO TFTs, which is the most important material quality parameter. By optimising deposition conditions and incorporating a high-k gate dielectric layer, the devices showed saturation mobility values over 50 cm2/Vs at a low operating voltage of 4 V. This is, to our knowledge, one of the highest field-effect mobility values achieved in ZnO-based TFTs by room temperature sputtering. As an important type of metal-oxide-based novel memory devices, which have been studied intensively in the last few years, RRAM devices were also explored. New materials, such as tin oxide (SnOx), were tested, exhibiting bipolar-switching operations and a relatively large resistance ratio. As a novel process variation, anodisation was performed, which yielded less impressive results than SnOx, but with a potential for ultra-low-cost manufacturing. Finally, novel planar nano-devices were explored, which have much simpler structures than conventional multi-layered transistors and diodes. Three types of ZnO-based nano-devices (a side-gated transistor, a self-switching diode and a planar inverter) were fabricated using both e-beam lithography and chemical wet etching. After optimisation of the challenging wet etching procedure at nanometre scale, ZnO nano-devices with good reproducibility and reliability have been demonstrated.