In the last years, with more and more transistors can fit into a chip, the growth the IC design complexity is fast and original design flow can¡¦t cater for designers. Therefore, so many people promote to integrate the system into a single chip gradually with the last technology using the concept of hardware/software co-design. In this thesis, we use the hardware/software co-design concept to build a simple video codec from system level and implement it on the ARM¡¦s SOC platform. We focus on the hardware/software co-ordination. Because we use the platform-based design method, the build hardware/software modules can be used in the similar architecture on the ARM platform In our Video codec system, discrete wavelet transform(DWT) and RGBtoYCbCr are the most timing-consuming parts. Since DWT has inherent scalability and excellent features of energy compaction, it has been applied widely in the various image compression systems. We adopt the 5-3 filter lifting-based DWT in the hardware part of our system and design three different lifting-based DWT architectures by using the high level synthesis concept to optimize the hardware utilization and speed. In the premise of not increasing memory access times and additional processes of software, we overcome the boundary extension of DWT and verify it by means of FPGA after combining it with the RGBtoYCbCr hardware architecture. Finally, the hardware part is integrated with the other part implemented by software, we build a completely video encode system on the ARM SOC platform using the hardware/software co-design.