Over the past decade, the satellite industry has witnessed the birth and evolution of the CubeSat standard, not only as a technology demonstrator tool but also as a human capacity development platform in universities. The use of commercial off the shelf (COTS) hardware components makes the CubeSat a cost effective and ideal solution to gain access to space in terms of budget and integration time for experimental science payloads. Satellite operations are autonomous and are essentially based on the interaction of interconnected electronic subsystems exchanging data according to the mission requirements and objectives. The onboard computer (OBC) subsystem is developed around a microcontroller and plays an essential role in this exchange process as it performs all the computing tasks and organises the collection of onboard housekeeping and payload data before downlink during an overpass above the ground station. The thesis here presented describes the process involved in the development, design and implementation of a prototype OBC for a CubeSat. An investigation covering previously developed CubeSat OBCs is conducted with emphasis on the characteristics and features of the microcontroller to be used in the design and implementation phases. A set of hardware requirements are defined and according to the current evolution on the microcontroller market, preference is given to the 32-bit core architecture over both its 8-bit and 16-bit counterparts. Following a well defined selection process, Atmel’s AT91SAM3U4E microcontroller which implements a 32-bit Cortex-M3 core is chosen and an OBC architecture is developed around it. Further, the proposed architecture is implemented as a prototype on a printed circuit board (PCB), presenting a set of peripherals necessary for the operation of the OBC. Finally, a series of tests successfully conducted on some of the peripherals are used to evaluate the proposed architecture.