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FlexRay Automotive Communication System Physical Layer Chip Design and A High Efficiency DC/DC Buck Converter with Sub-3 ¡Ñ VDDWang, Ching-lin 01 July 2009 (has links)
This thesis comprises two topics : the first one is the design and implementation of FlexRay automotive communication system physical layer. The second part is the design of a high efficiency DC/DC Buck converter with sub-3 ¡Ñ VDD.
The first topic discloses the physical layer design comprising the Bus Guardian and the Bus Driver used in an in-vehicle network compliant with FlexRay standards. It is realized in a mixed-signal chip using TSMC 1P6M 0.18 £gm CMOS process. Its core area is less than 0.8 mm2, and power consumption is less than 60 mW.
The second topic is to design a DC to DC step-down converter, which can accommodate wide range VDD. By utilizing stacked power MOSFETs, a voltage level converter, a detector and a controller, the design is realized by a typical 1P6M 0.18 £gm CMOS process without any high voltage technology. The core area is less than 0.184 mm2, while the VDD range is up to 5 V. Since the internal reference voltage is 1 V, it can increase the output regulation range. The proposed design attains very high conversion efficiency to prolong the life time of power supply. Therefore, it can be integrated in a system chip to provide multiple supply voltage sources.
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