Le travail réalisé au cours de cette thèse porte sur l’optimisation du transistor bipolaire à hétérojonction Si/SiGe:C pour les applications d’amplification de puissance pour les communications sans fils. Nous présentons tout d’abord la structure d’étude. Il s’agit du transistor bipolaire à hétérojonction Si/SiGe:C intégré en technologie BiCMOS 0.25µm sur plaques 200mm. La cellule dédiée à l’amplification de puissance est présentée. Une attention particulière est apportée aux phénomènes thermiques inhérents à ce type de cellules ainsi qu’aux solutions mises en œuvre pour les atténuer. Les diverses optimisations réalisées sur l’architecture du TBH sont détaillées. Ces optimisations touchent à la fois à la modification du procédé technologique et au dessin du transistor. Notre étude porte sur l’amélioration des performances petit et grand signal via l’optimisation des paramètres technologiques définissant la structure épitaxiale intrinsèque de base et de collecteur ainsi que des règles de dessin du transistor. Enfin, deux types d’architectures de TBH développées sont présentées. L’une de type simple polysilicium quasi auto-alignée qui s’intègre dans une technologie dédiée à l’amplification de puissance, l’autre présentant une structure double polysilicium également auto-alignée. / The present work deals with Si/SiGe:C heterojonction bipolar transistor optimization for power amplifier applications dedicated to wireless communications. We first present the investigated structure, a Si/SiGe:C heterojonction bipolar transistor integrated in a 0.25µm BiCMOS technology on 200 mm wafers. We discuss the cell dedicated to power amplification. We have paid attention to thermal phenomenon linked to this kind of cell and to possible dedicated solutions. Various optimizations realized on HBT architecture are detailed. These optimizations concern technological process modifications and transistor design. The main objective of this work is to improve both large and small signal characteristics. This is obtained by transistor design rule variations, collector and base intrinsic parameters optimization. Finally, two kind of developed HBT architectures are presented. One, simple polysilicium quasi self aligned, integrated in a technology dedicated to power amplification, the other one fully self aligned with double polysilicium structure.

Le travail porte sur le développement et l’optimisation de transistors bipolaires à hétérojonction (TBH) SiGe et SiGeC par conception technologique assistée par ordinateur (TCAD). L'objectif est d'aboutir à un dispositif performant réalisable technologiquement, en tenant compte de tous les paramètres : étapes de fabrication technologiques, topologie du transistor, modèles physiques. Les études menées permettent d’atteindre les meilleures performances, en particulier une amélioration importante de la fréquence maximale d’oscillation (fMAX). Ce travail est la première approche développée pour la simulation des TBH SiGeC qui prend en compte l'impact de la contrainte et de la teneur en germanium et en carbone dans la base; conjointement pour les simulations des procédés de fabrication et les simulations électriques.Pour ce travail, nous avons développé et implémenté dans le simulateur TCAD des méthodes d'extraction de fMAX prenant en compte les éléments parasites intrinsèques et extrinsèques. Nous avons développé et implémenté un modèle pour la densité effective d’états fonction de la teneur en germanium et en carbone dans la base. Les modèles pour la bande interdite, la mobilité et le temps de relaxation de l'énergie sont calibrés sur la base de simulations Monte-Carlo.Les différentes analyses présentées dans cette thèse portent sur six variantes technologiques de TBH. Trois nouvelles architectures de TBH SiGeC avancés ont été élaborées et proposées pour des besoins basse et haute performance. Grace aux résultats obtenus, le meilleur compromis entre les différents paramètres technologiques et dimensionnels permettent de fabriquer un TBH SiGeC avec une valeur de fMAX de 500 GHz, réalisant ainsi l’objectif principal de la thèse. / The present work investigates the technology development of state-of-the-art SiGe and SiGeC Heterojunction Bipolar Transistors (HBT) by means of technology computer aided design (TCAD). The objective of this work is to obtain an advanced HBT very close to the real device not only in its process fabrication steps, but also in its physical behavior, geometric architecture, and electrical results. This investigation may lead to achieve the best electrical performances for the devices studied, in particular a maximum operating frequency of 500 GHz. The results of this work should help to obtain more physical and realistic simulations, a better understanding of charge transport, and to facilitate the development and optimization of SiGe and SiGeC HBT devices.The TCAD simulation kits for SiGe/SiGeC HBTs developed during our work have been carried out in the framework of the STMicroelectronics bipolar technology evolution. In order to achieve accurate simulations we have used, developed, calibrated and implemented adequate process models, physical models and extraction methodologies. To our knowledge, this work is the first approach developed for SiGe/SiGeC HBTs which takes into account the impact of the strain, and of the germanium and carbon content in the base, for both: process and electrical simulations.In this work we will work with the successive evolutions of B3T, B4T and B5T technologies. For each new device fMAX improves of 100 GHz, thus the technology B3T matches to 300 GHz, B4T and B5T to 400 and 500 GHz, respectively.Chapter one introduces the SiGe SiGeC heterojunction bipolar technologies and their operating principles. This chapter deals also with the high frequency AC transistor operation, the extraction methods for fMAX and the carrier transport in extremely scaled HBTs.Chapter two analyzes the physical models adapted to SiGeC strained alloys used in this work and the electrical simulation of HBT devices. This is also an important work of synthesis leading to the selection, implementation and development of dedicated models for SiGeC HBT simulation.Chapter three describes the B3T TCAD simulation platform developed to obtain an advanced HBT very close to the real device. In this chapter the process fabrication of the B3T technology is described together with the methodology developed to simulate advanced HBT SiGeC devices by means of realistic TCAD simulations.Chapter four describes the HBT architectures developed during this work. We will propose low-cost structures with less demanding performance requirements and highly performing structures but with a higher cost of production. The B4T architecture which has been manufactured in clean-room is deeply studied in this chapter. The impact of the main fabrication steps is analyzed in order to find the keys process parameters to increase fMAX without degrading other important electrical characteristics. At the end of this chapter the results obtained is used to elaborate a TCAD simulation platform taking into account the best trade-off of the different key process parameters to obtain a SiGeC HBT working at 500 GHz of fMAX.

The present work investigates the technology development of state-of-the-art SiGe and SiGeC Heterojunction Bipolar Transistors (HBT) by means of technology computer aided design (TCAD). The objective of this work is to obtain an advanced HBT very close to the real device not only in its process fabrication steps, but also in its physical behavior, geometric architecture, and electrical results. This investigation may lead to achieve the best electrical performances for the devices studied, in particular a maximum operating frequency of 500 GHz. The results of this work should help to obtain more physical and realistic simulations, a better understanding of charge transport, and to facilitate the development and optimization of SiGe and SiGeC HBT devices.The TCAD simulation kits for SiGe/SiGeC HBTs developed during our work have been carried out in the framework of the STMicroelectronics bipolar technology evolution. In order to achieve accurate simulations we have used, developed, calibrated and implemented adequate process models, physical models and extraction methodologies. To our knowledge, this work is the first approach developed for SiGe/SiGeC HBTs which takes into account the impact of the strain, and of the germanium and carbon content in the base, for both: process and electrical simulations.In this work we will work with the successive evolutions of B3T, B4T and B5T technologies. For each new device fMAX improves of 100 GHz, thus the technology B3T matches to 300 GHz, B4T and B5T to 400 and 500 GHz, respectively.Chapter one introduces the SiGe SiGeC heterojunction bipolar technologies and their operating principles. This chapter deals also with the high frequency AC transistor operation, the extraction methods for fMAX and the carrier transport in extremely scaled HBTs.Chapter two analyzes the physical models adapted to SiGeC strained alloys used in this work and the electrical simulation of HBT devices. This is also an important work of synthesis leading to the selection, implementation and development of dedicated models for SiGeC HBT simulation.Chapter three describes the B3T TCAD simulation platform developed to obtain an advanced HBT very close to the real device. In this chapter the process fabrication of the B3T technology is described together with the methodology developed to simulate advanced HBT SiGeC devices by means of realistic TCAD simulations.Chapter four describes the HBT architectures developed during this work. We will propose low-cost structures with less demanding performance requirements and highly performing structures but with a higher cost of production. The B4T architecture which has been manufactured in clean-room is deeply studied in this chapter. The impact of the main fabrication steps is analyzed in order to find the keys process parameters to increase fMAX without degrading other important electrical characteristics. At the end of this chapter the results obtained is used to elaborate a TCAD simulation platform taking into account the best trade-off of the different key process parameters to obtain a SiGeC HBT working at 500 GHz of fMAX.

This letter presents the design and characterization results of a multi-octave power amplifier fabricated in a 0.13μm SiGe-BiCMOS technology. The single stage power amplifier is implemented as the stack of a cascode amplifier combining broadband input matching network with resistive feedback, and a common-base amplifier with base capacitive feedback. Measurement results show that the design delivers a peak saturated output power level of 20.2 dBm, with output 1 dB compression at 19.4 dBm. The measured 3 dB power bandwidth is from 4 GHz to 32 GHz, covering three octaves. The corresponding power fractional bandwidth is 156 %. The measured peak power added efficiency is 20.6 %, and peak small signal gain is 18.6 dB. The fabricated integrated circuit occupies an area of 0.71mm2. To compare state-of-the-art multi-octave power amplifiers, the power amplifier figure of merit defined by the international technology roadmap for semiconductors is modified to include power fractional bandwidth and area. To the knowledge of the authors, the presented design achieves the highest figure of merit among multi-octave power amplifiers in a silicon based integrated circuit technology reported in literature.