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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

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Spelling suggestions: "subject:"iit synchronisation"" "subject:"iit asynchronisation""

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PC Plug-In Telemetry Decommutator Using FPGAS

Vishwanathan, A. N., Biju, S., Narayana, T. V., Anguswamy, P., Singh, U. S. 11 1900 (has links)
International Telemetering Conference Proceedings / October 30-November 02, 1995 / Riviera Hotel, Las Vegas, Nevada / This paper describes the design of a PC plug-in card that incorporates all functions of the base band segment of a PCM decommutator which includes the bit synchroniser (BS), frame synchroniser (FS) and subframe synchroniser (SFS). FPGAs are used for the realization of the digital sections of the circuit. The card is capable of handling all standard IRIG codes. The bit synchroniser can handle data rates upto 1Mbps (NRZL), while the frame and subframe synchronisers have been designed to work upto 10 Mbps.
Decommutation
Bit Synchronisation
FPGA

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