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Study on Amorphous Silicon Carbide Barrier Dielectric MaterialsChen, Chih-Hung 27 July 2002 (has links)
In the generation of deep submicron semiconductor fabrication¡Atransmission delay is primarily caused by the parasitic resistance and capacitance (RC) in the multilevel interconnects. Besides¡Aelectromigration is also a serious issue for the reliability of devices . There are two principle methods of reducing the RC delay. The first method is to replace the Al wires with Cu interconnects which supply lower resistivity and high resistance to electromigration. The second method is to use a lower dielectric constant material as the inter-metal dielectric. But in Copper metallization¡Athe key issue of this technology is the formation of a thin barrier layer for Cu on the surface of the SiC film to prevent the absorption of water and diffusion of Cu.
In this study¡Awe employed films SiC base compounds to investigate their chemical bonds, I-V characteristics comparisons with Al and Cu gate. On the other hand, because of serious C-V hysteretic phenomena, we try to analyze and build up models. There five models is reasonable for our experiment: (1) mobile ions, (2) dielectric polarization, (3) carrier injection, (4) gate-electrons injection, and (5) bound charges. They happens in different materials and structures.
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