abstract: This work presents a communication paradigm, using a context-aware mixed reality approach, for instructing human workers when collaborating with robots. The main objective of this approach is to utilize the physical work environment as a canvas to communicate task-related instructions and robot intentions in the form of visual cues. A vision-based object tracking algorithm is used to precisely determine the pose and state of physical objects in and around the workspace. A projection mapping technique is used to overlay visual cues on tracked objects and the workspace. Simultaneous tracking and projection onto objects enables the system to provide just-in-time instructions for carrying out a procedural task. Additionally, the system can also inform and warn humans about the intentions of the robot and safety of the workspace. It was hypothesized that using this system for executing a human-robot collaborative task will improve the overall performance of the team and provide a positive experience to the human partner. To test this hypothesis, an experiment involving human subjects was conducted and the performance (both objective and subjective) of the presented system was compared with a conventional method based on printed instructions. It was found that projecting visual cues enabled human subjects to collaborate more effectively with the robot and resulted in higher efficiency in completing the task. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2017

abstract: Modern-day integrated circuits are very capable, often containing more than a billion transistors. For example, the Intel Ivy Bridge 4C chip has about 1.2 billion transistors on a 160 mm2 die. Designing such complex circuits requires automation. Therefore, these designs are made with the help of computer aided design (CAD) tools. A major part of this custom design flow for application specific integrated circuits (ASIC) is the design of standard cell libraries. Standard cell libraries are a collection of primitives from which the automatic place and route (APR) tools can choose a collection of cells and implement the design that is being put together. To operate efficiently, the CAD tools require multiple views of each cell in the standard cell library. This data is obtained by characterizing the standard cell libraries and compiling the results in formats that the tools can easily understand and utilize. My thesis focusses on the design and characterization of one such standard cell library in the ASAP7 7 nm predictive design kit (PDK). The complete design flow, starting from the choice of the cell architecture, design of the cell layouts and the various decisions made in that process to obtain optimum results, to the characterization of those cells using the Liberate tool provided by Cadence design systems Inc., is discussed in this thesis. The end results of the characterized library are used in the APR of a few open source register-transfer logic (RTL) projects and the efficiency of the library is demonstrated. / Dissertation/Thesis / Masters Thesis Computer Engineering 2017

abstract: Each programming language has a compiler associated with it which helps to identify logical or syntactical errors in the program. These compiler error messages play important part in the form of formative feedback for the programmer. Thus, the error messages should be constructed carefully, considering the affective and cognitive needs of programmers. This is especially true for systems that are used in educational settings, as the messages are typically seen by students who are novice programmers. If the error messages are hard to understand then they might discourage students from understanding or learning the programming language. The primary goal of this research is to identify methods to make the error messages more effective so that students can understand them better and simultaneously learn from their mistakes. This study is focused on understanding how the error message affects the understanding of the error and the approach students take to solve the error. In this study, three types of error messages were provided to the students. The first type is Default type error message which is an assembler centric error message. The second type is Link type error message which is a descriptive error message along with a link to the appropriate section of the PLP manual. The third type is Example type error message which is again a descriptive error message with an example of the similar type of error along with correction step. All these error types were developed for the PLP assembly language. A think-aloud experiment was designed and conducted on the students. The experiment was later transcribed and coded to understand different approach students take to solve different type of error message. After analyzing the result of the think-aloud experiment it was found that student read the Link type error message completely and they understood and learned from the error message to solve the error. The results also indicated that Link type was more helpful compare to other types of error message. The Link type made error solving process more effective compared to other error types. / Dissertation/Thesis / Masters Thesis Software Engineering 2018

<p> Video streaming has become ubiquitous and pervasive in usage of the electronic displaying devices. Streaming becomes more challenging when dealing with an enormous number of video streams. Particularly, the challenges lie in streaming types, video transcoding, video storing, and video delivering to users with high satisfaction and low cost for video streaming providers. In this dissertation, we address the challenges and issues encountered in video streaming and cloud-based video streaming. Specically, we study the impact factors on video transcoding in the cloud, and then we develop a model to trade-o between performance and cost of cloud. On the other hand, video streaming providers generally have to store several formats of the same video and stream the appropriate format based on the characteristics of the viewer's device. This approach, called pre-transcoding, incurs a signicant cost to the stream providers that rely on cloud services. Furthermore, pre-transcoding is proven to be inecient due to the long-tail access pattern to video streams. To reduce the incurred cost, we propose to pre-transcode only frequently-accessed videos (called hot videos) and partially pre-transcode others, depending on their hotness degree. Therefore, we need to measure video stream hotness. Accordingly, we first, provide a model to measure the hotness of video streams. Then, we develop methods that operate based on the hotness measure and determine how to pre-transcode videos to minimize the cost of stream providers. The partial pre-transcoding methods operate at dierent granularity levels to capture dierent patterns in accessing videos. Particularly, one of the methods operates faster but cannot partially pre-transcode videos with the non-long-tail access pattern. Experimental results show the ecacy of our proposed methods, specically, when a video stream repository includes a high percentage of Frequently Accessed Video Streams and a high percentage of videos with the non-long-tail accesses pattern.</p><p>

abstract: Smart home system (SHS) is a kind of information system aiming at realizing home automation. The SHS can connect with almost any kind of electronic/electric device used in a home so that they can be controlled and monitored centrally. Today's technology also allows the home owners to control and monitor the SHS installed in their homes remotely. This is typically realized by giving the SHS network access ability. Although the SHS's network access ability brings a lot of conveniences to the home owners, it also makes the SHS facing more security threats than ever before. As a result, when designing a SHS, the security threats it might face should be given careful considerations. System security threats can be solved properly by understanding them and knowing the parts in the system that should be protected against them first. This leads to the idea of solving the security threats a SHS might face from the requirements engineering level. Following this idea, this paper proposes a systematic approach to generate the security requirements specifications for the SHS. It can be viewed as the first step toward the complete SHS security requirements engineering process. / Dissertation/Thesis / M.C.St. Computing Studies 2013

abstract: Stream computing has emerged as an importantmodel of computation for embedded system applications particularly in the multimedia and network processing domains. In recent past several programming languages and embedded multi-core processors have been proposed for streaming applications. This thesis examines the execution and dynamic scheduling of stream programs on embedded multi-core processors. The thesis addresses the problem in the context of a multi-tasking environment with a time varying allocation of processing elements for a particular streaming application. As a solution the thesis proposes a two step approach where the stream program is compiled to gather key application information, and to generate re-targetable code. A light weight dynamic scheduler incorporates the second stage of the approach. The dynamic scheduler utilizes the static information and available resources to assign or partition the application across the multi-core architecture. The objective of the dynamic scheduler is to maximize the throughput of the application, and it is sensitive to the resource (processing elements, scratch-pad memory, DMA bandwidth) constraints imposed by the target architecture. We evaluate the proposed approach by compiling and scheduling benchmark stream programs on a representative embedded multi-core processor. We present experimental results that evaluate the quality of the solutions generated by the proposed approach by comparisons with existing techniques. / Dissertation/Thesis / M.S. Electrical Engineering 2013

<p> The human vision system almost always parses visual scenes into objects, and recovers those objects accurately, forming veridical 3D perceptions. Veridical means "coinciding with reality", or seeing what is really "out there" in the world. Research is perceptual psychology has demonstrated the importance of priors in human vision, and 3D mirror symmetry prior is the most important prior. However, there has been comparatively little computer vision research in 3D mirror symmetry, despite the acknowledged importance of priors. In this thesis a principled approach is developed to the study of computer vision problems using priors, and applied to figure/ground organization (FGO), and the recovery of 3D objects from camera images. Before the new theoretical and experimental results are presented, the relevant geometrical and computational tools are reviewed. It is argued that symmetry is an informative prior in both FGO and 3D recovery. 3D symmetry aids FGO because (i) many individual objects exhibit symmetry, and (ii) configurations of unrelated objects are rarely symmetrical. Using <i>K</i>-means as a baseline, this approach was tested on a corpus of 180 image pairs. Symmetry based FGO outperforms the baseline in almost all cases. With respect to 3D object recovery, 3D symmetry constrains the 3D interpretation of the object image, and provides an accurate method to locate object points in <b>R</b>³. 3D object recovery was tested on a corpus of 89 image pairs. The average 3D reconstruction error is reported. Furthermore, animations are presented showing 3D reconstructions. Finally, two simulations were run that (i) compare the accuracy of 3D recovery against Triangulation, and (ii) estimate the expected precision and accuracy of 3D recovery.</p><p>

<p> The advent of hypervisors revolutionized the computing industry in terms of <i>malware prevention and detection, secure virtual machine managers, </i> and <i>cloud resilience.</i> However, this has resulted in a disjointed response to handling known threats rather than preventing unknown <i>zero-day</i> threats. This thesis introduces a new paradigm to cloud computing &ndash; <i>utility virtual machines</i> &ndash; that directly leverages virtualization hardware for protection and eliminates often accepted roles of the operating system kernel. This represents a break from prevailing practices and serves to establish a hardware root of trust for system operation.</p><p>

Data caching at mobile units can greatly reduce communications and has been a proven method of decreasing problems associated with mobile communications. It was found that although the existing semantic caching algorithm outperformed the least recently used caching mechanisms, it didn't support the location dependent data model used for location dependent queries. Hence, the primary goal of this thesis was to enhance the already existing semantic caching algorithm to be able to use features of XML and semi-structured data, allowing for exchange of data within the various data models. To enhance the semantic caching algorithm with XML features, a XML layer was built around all the interacting components forming a XML wrapper. A detailed simulation compared other algorithms with the semantic caching algorithm with XML layer and results obtained strengthened the fact that semantic caching algorithm with the overhead of XML layer around it, always outperform the present day least recently used algorithm for mobile environment.

The primary purpose of this thesis was to design a logical simulation of a communication sub block to be used in the effective communication of digital data between the host and the peripheral devices. The module designed is a Serial interface engine in the Universal Serial Bus that effectively controls the flow of data for communication between the host and the peripheral devices with the emphasis on the study of timing and control signals, considering the practical aspects of them. In this study an attempt was made to realize data communication in the hardware using the Verilog Hardware Description language, which is supported by most popular logic synthesis tools. Various techniques like Cyclic Redundancy Checks, bit-stuffing and Non Return to Zero are implemented in the design to provide enhanced performance of the module.