This thesis describes the development of a fast rate method for the deposition of high quality CdS and CdTe thin films. The technique uses Pulsed DC Magnetron Sputtering (PDCMS). Surprisingly, the technique produces highly stable process conditions. CREST is the first laboratory worldwide to show that pulsed DC power may be used to deposit CdS and CdTe thin films. This is a very promising process technology with potential for eventual industrial deployment. The major advantage is that the process produces high deposition rates suitable for use in solar module manufacturing. These rates are over an order of magnitude faster than those obtained by RF sputtering. In common with other applications it has also been found that the energetics of the pulsed DC process produce excellent thin film properties and the power supply configuration avoids the need for complex matching circuits. Conventional deposition methodologies for CdS, Chemical Bath Deposition (CBD) and CdTe thin films, Electrodeposition (ED), have been chosen as baselines to compare film properties with Pulsed DC Magnetron Sputtering (PDCMS). One of the issues encountered with the deposition of CdS thin films (window layers) was the presence of pinholes. A Plasma cleaning process of FTO-coated glass prior to the deposition of the CdS/CdTe solar cell has been developed. It strongly modifies and activates the TCO surface, and improves the density and compactness of the deposited CdS thin film. This, in turn, improves the optical and morphological properties of the deposited CdS thin films, resulting in a higher refractive index. The pinhole removal and the increased density allows the use of a much thinner CdS layer, and this reduces absorption of blue spectrum photons and thereby increases the photocurrent and the efficiency of the thin film CdTe cell. Replacing the conventional magnetic stirrer with an ultrasonic probe in the chemical bath (sonoCBD) was found to result in CdS films with higher optical density, higher refractive index, pinhole and void-free, more compact and uniform along the surface and through the thickness of the deposited material. PDCMS at 150 kHz, 500 W, 2.5 μs, 2 s, results in a highly stable process with no plasma arcing. It allows close control of film thickness using time only. The CdS films exhibited a high level of texture in the <001> direction. The grain size was typically ~50 nm. Pinholes and voids could be avoided by reducing the working gas pressure using gas flows ii below 20 sccm. The deposition rate was measured to be 1.33 nm/s on a rotating substrate holder. The equivalent deposition rate for a static substrate is 8.66 nm/s, which is high and much faster than can be achieved using a chemical bath deposition or RF magnetron sputtering. The transmission of CdS can be improved by engineering the band gap of the CdS layer. It has been shown that by adding oxygen to the working gas pressure in an RF sputtering deposition process it is possible to deposit an oxygenated CdS (CdS:O) layer with an improved band gap. In this thesis, oxygenated CdS films for CdTe TF-PV applications have been successfully deposited by using pulsed DC magnetron sputtering. The process is highly stable using a pulse frequency of 150 kHz and a 2.5 μs pulse reverse time. No plasma arcing was detected. A range of CdS:O films were deposited by using O2 flows from 1 sccm to 10 sccm during the deposition process. The deposition rates achieved using pulsed DC magnetron sputtering with only 500 W of power to the magnetron target were in the range ~1.49 nm/s ~2.44 nm/s, depending on the oxygen flow rate used. The properties of CdS thin films deposited by pulsed DC magnetron sputtering and chemical bath deposition have been studied and compared. The pulsed DC magnetron sputtering process produced CdS thin films with the preferred hexagonal <001> oriented crystalline structure with a columnar grain growth, while sonoCBD deposited films were polycrystalline with a cubic structure and small grainy crystallites throughout the thickness of the films. Examination of the PDCMS deposited CdS films confirmed the increased grain size, increased density, and higher crystallinity compared to the sonoCBD CdS films. The deposition rate for CdS obtained using pulsed DC magnetron sputtering was 2.86 nm/s using only 500 W power on a six inch circular target compared to the much slower (0.027 nm/s) for the sonoChemical bath deposited layers. CdTe thin films were grown on CdS films prepared by sonoCBD and Pulsed DC magnetron sputtering. The results showed that the deposition technique used for the CdS layer affected the growth and properties of the CdTe film and also determined the deposition rate of CdTe, being 3 times faster on the sputtered CdS. PDCMS CdTe layers were deposited at ambient temperature, 500 W, 2.9 μs, 10 s, 150 kHz, with a thickness of approximately 2 μm on CdS/TEC10 coated glass. The layers appear iii uniform and smooth with a grain size less than 100 nm, highly compact with the morphology dominated by columnar grain growth. Stress analysis was performed on the CdTe layers deposited at room temperature using different gas flows. Magnetron sputtered thin films deposited under low gas pressure are often subject to compressive stress due to the high mobility of the atoms during the deposition process. A possible way to reduce the stress in the film is the post-deposition annealing treatment. As the lattice parameter increased; the stress in the film is relieved. Also, a changing the deposition substrate temperature had an effect on the microstructure of CdTe thin films. Increasing the deposition temperature increased the grain size, up to ~600 nm. CdTe thin films with low stress have been deposited on CdS/TEC10 coated glass by setting the deposition substrate temperature at ~200°C and using high argon flows ~ 70 sccm Ar. Finally, broadband multilayer ARCs using alternate high and low refractive index dielectric thin films have been developed to improve the light transmission into solar cell devices by reducing the reflection of the glass in the extended wavelength range utilised by thin-film CdTe devices. A four-layer multilayer stack has been designed and tested, which operates across the wavelength range used by thin-film CdTe PV devices (400 850 nm). Optical modelling predicts that the MAR coating reduces the WAR (400-850 nm) from the glass surface from 4.22% down to 1.22%. The application of the MAR coating on a thin-film CdTe solar cell increased the efficiency from 10.55% to 10.93% or by 0.38% in absolute terms. This is a useful 3.6% relative increase in efficiency. The increased light transmission leads to improvement of the short-circuit current density produced by the cell by 0.65 mA/cm2. The MAR sputtering process developed in this work is capable of scaling to an industrial level.

In this work, we have designed, simulated, fabricated and characterized homojunction Hg1-xCdxTe detector for high operating temperature in the MWIR region. The IR photon detectors need cryogenic cooling to suppress thermal generation. The temperature of operation in narrow gap semiconductor devices is limited by the noise due to statistical nature of thermal generation-recombination in narrow gap semiconductors. To make IR systems affordable they have to be operated without cooling or with minimal cooling compatible with low cost, low power and long life. Several fundamental and technological limitations to uncooled operation of photon detectors have been discussed in Chapter-1 of this thesis. Way and means adopted to increase the operating temperature, such as non-equilibrium operation, use of multilayer stacked hetero¬structures, optical immersion etc. have also been discussed. Key to improving the detector performance at any temperature is reduction of dark currents to level below the photocurrent and ultimately to the level where detector noise is determined by the fluctuations in photon flux from the scene (BLIP limit). In addition, design of present generation uncooled Hg1-xCdxTe infrared photon detectors relies on complex hetero-structures with a basic unit cell of type n+/π/p+. Theoretical modeling and numerical simulations on TLHJ device consisting of backside illuminated n+/π/p+ photodiodes have been performed. A numerical model for solving carrier transport equations for Hg1-xCdxTe infrared photodiodes was developed in MATLAB. Finite difference discretization of carrier transport equations and successive over relaxation method have been adopted. Numerical models are more appropriate than analytical models when analyzing multi-layer hetero-structures because we can account for realistic doping profiles, compositional grading and hetero-structures using this model. The model can be suitably modified to accommodate different device architectures, designs, material properties and operating temperature. Such a generalized model is useful to a device designer to customize the detector performance as per the availability of the material to suit the application specific requirements. The present work therefore proposes a more flexible, accurate and generalized methodology to accommodate the user needs by simulating the position dependence of carrier concentration, electrostatic potential and g-r rates and their effect on detector performance vis-à¬vis contact doping, absorber doping and absorber width on device performance. We detail aspects of our simulation model by developing a library of Hg1-xCdxTe properties using analytical and empirical expressions for material parameters (energy band gap, electron affinity, intrinsic carrier concentration, carrier effective mass, carrier mobility, dielectric constant and absorption coefficient). The PDEs were solved using the FDM coupled with SOR method. Behavior of Hg1-xCdxTe diodes (homo/hetero-junction) under different biasing, illumination and non equilibrium situations were modeled. Model has been validated for experimental measured data on n on p Hg1-xCdxTe photodiodes. The numerical computations are next applied to simulation/modeling of MWIR (λc=4.5 μm) n+/π/p+ TLHJ device for operation at T=250K. Several recombination processes occur in Hg1¬-xCdxTe depending on material quality, operating temperature, device design and processing conditions. Detailed mathematical models of radiative, Auger, Shockley Read Hall (SRH), surface recombination and optical g-r are analyzed and their effect on carrier lifetime have been evaluated. Analytical models for dark currents affecting the performance of Hg1-xCdxTe diodes at different temperatures are discussed. The mechanisms contributing to dark current are: (i) the thermal diffusion of minority carriers from the neutral regions (IDiff); (ii) generation-recombination from the space charge region of diode (IG-R) (iii) trap assisted tunneling currents, wherein the traps in the depletion region or the traps in the quasi neutral p region close to the depletion edge participate in the tunneling process(ITAT); (iii) band-to-band tunneling currents (IBTB) and (iv) surface leakage currents due to shunt resistance. Total current of a photodiode is ITOT=IDiff+IG-R+ITAT+IBTB+ISH-IP, where IP is the photocurrent. We evaluate the variation of electrostatic potential, carrier concentration, and electric field and g-r profiles as a function of position. The effect of variation in absorber width, doping and contact doping on D* is also analyzed. The mathematical models of different g-r processes (Auger, SRH, radiative, surface recombination and optical generation) affecting the device performance analyzed and their affect on carrier lifetimes are investigated. Responsivity ~3.25Amp-Watt-1, noise current~2pA/Hz1/2 and D* ~8x109 cmHz1/2watt-1 at 0.1V reverse bias have been calculated using optimized values of doping concentration, absorber width and carrier lifetime. The suitability of the method has been illustrated by demonstrating the feasibility of achieving the optimum device performance by carefully selecting the device design and other parameters. The numerical models provided insight about the operation and performance of Hg1-xCdxTe Auger-suppressed infrared photodiodes. Hetero-junction configuration increases the dynamic resistance, while the heavily doped contacts reduce the contact resistance. Wide gap/heavily doped contacts present a barrier to injection of minority carries into the absorber layer. At the same time they allow collection of minority carriers generated in the absorber region at the contacts. Hg1-xCdxTe hetero-diodes are grown by MOCVD and MBE with precise doping and compositional gradient control to reduce g-r contributions from defects and dislocations to the dark current in order to reap advantages of Auger suppression. Measured dark currents in hetero-junction photodiodes continue to be larger than expected in spite of the advancements in MBE technique. Delineation of an array on hetero-structures involves mesa separation of the diodes thus creating additional surface requiring passivation. Overall, the whole effort of fabricating a hetero Hg1-xCdxTe detector array is disproportionate to the overall gain in the performance. Therefore, we employ a much simpler fabrication process of homo-junction Hg1-xCdxTe detectors. It involves a planar device fabrication approach thus minimizing the surface passivation problem. We have deliberated upon the specific growth, characterization techniques and processing steps employed in our study. We discuss some of the experimental issues. We also presented results on the novel processing techniques developed that are potentially applicable to HOT technology and Hg1-xCdxTe technology in general. Hg1-xCdxTe (x=0.27-0.31) layer of ~ 15×15mm2 area and 15-20µm thickness is grown on CdZnTe substrate by Liquid Phase Epitaxy (LPE) in-house. As grown wafer is vacancy doped p-type with a carrier concentration of ~5×1015-1x1016 cm-3 and hole mobility of ~400cm2V-1s-1@80K. Planar n+/ν/p junction ~2-3µm deep is formed by B+ ion implantation and subsequent annealing; details are outlined in Chapter-4. Hall measurements and differential Hall measurements were used to find the carrier concentration, carrier mobility, resistivity of the wafer. The diodes are formed in the form of a 2D array along with various PEV’s for process characterization. Composition of Hg1-xCdxTe wafers used for the work is in the range of 0.27¬ 0.31 as determined by FTIR, corresponding to cutoff wavelength of 4.5-6.5µm. Junction depth and doping profile of the diodes after ion implantation was characterized by differential Hall technique. Transient minority carrier lifetime in fabricated MWIR n+/ν/p Hg1-xCdxTe (x=0.27) diodes were characterized using diode reverse-recovery technique. We prefer this method because it is a direct indicator of device as well as material quality post processing. By this time the device has undergone all the chemical/mechanical treatments and the measured lifetime is the cumulative of g-r mechanisms operative in bulk, space charge region and surface of diode. The value of lifetime extracted from the measured data lies in the range of 80-160ns. Variable temperature lifetime data was also extracted to determine the prevalent g-r process operative in the device. Diode dark I-V and junction C-V measurements were also made to correlate the observed behavior of the measured lifetime with g-r processes. Evidence of Auger suppression at room temperature is seen in the dark I-V characteristics via observation of negative differential resistance in the homo-junction Hg1-xCdxTe diodes. The experimental data is fitted using the numerical and analytical models developed. Based on this fitting, the current mechanisms limiting the dark current in these photodiodes are extracted. An improved analytical I-V model is reported by incorporating TAT and electric field enhanced Shockley-Read-Hall generation recombination process due to dislocations. Tunneling currents are fitted before and after the Auger suppression of carriers with energy level of trap (Et), trap density (Nt) and the doping concentrations of n+ and νregions as fitting parameters. Values of Et and Nt were determined as 0.78-0.80Eg and ~7-9×1014 cm-3 respectively in all cases. Doping concentration of νregion was found to exhibit non-equilibrium depletion from a value of 2×1016 to 4×1015 cm-3. Quantum efficiency of the diodes was found to ~25-30%. Note, that these are wafer level measurements on unpackaged device without backside AR coating. In addition to junction diodes, we present results on several PEV's such as VADA, MIS/MIM capacitors and TLM structures both at room and low temperature. Variable temperature measurements for a VADA tile and subsequent analysis provide evidence of g-r processes originating from defects, dislocations and dislocation loops, which are non-uniformly distributed across the Hg1-xCdxTe wafer and contributes to TAT current at high temperatures. MIS analysis yielded surface charge density lying between 3×1010-1×1011 cm-2 for ZnS/CdTe surface corresponding to a near flat band condition. Results of low and variable temperature measurements on the devices have also been shown to correlate it with the possibility of operating the device at mid temperatures such as 180-250K.