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国立情報学研究所で電子化したコンテンツを使用している。

国立情報学研究所で電子化したコンテンツを使用している。

The rapid increase in the use of embedded systems for performing secure transactions, has proportionally increased the security threats which are faced by such devices. Side channel attack, a sophisticated security threat to embedded devices like smartcards, mobile phones and PDAs, exploits the external manifestations like processing time, power consumption and electromagnetic emission to identify the internal computations. Power analysis attack, introduced by Kocher in 1998, is used by adversaries to eavesdrop on confidential data while the device is executing a secure transaction. The adversary observes the power trace dissipated/consumed by the chip during the encryption/decryption of the AES cryptographic program and predicts the secret key used for encryption by extracting necessary information from the power trace. Countermeasures proposed to overcome power analysis are data masking, table masking, current flattening, circuitry level solutions, dummy instruction insertions, balancing bit-flips, etc. All these techniques are either susceptible to multi-order side channel attacks, not sufficiently generic to cover all encryption algorithms, or burden the system with high area cost, run-time or energy consumption. The initial solution presented in this thesis is a HW/SW based randomised instruction injection technique, which infuses random instructions at random places during the execution of an application. Such randomisation obfuscates the secure information from the power profile, not allowing the adversary to extract the critical power segments for analysis. Further, the author devised a systematic method to measure the security level of a power sequence and used it to measure the number of random instructions needed, to suitably confuse the adversary. The proposed processor model costs 1.9% in additional area for a simplescalar processor, and costs on average 29.8% in runtime and 27.1% in additional energy consumption for six industry standard cryptographic algorithms. This design is extended to a processor architecture which automatically detects the execution of the most common encryption algorithms, starts to scramble the power waveform by adding randomly placed instructions with random register accesses, and stops injecting instructions when it is safe to do so. This approach has less overheads compared to previous solutions and avoids software instrumentation, allowing programmers with no special knowledge to use the system. The extended processor model costs an additional area of 1.2%, and an average of 25% in runtime and 28.5% in energy overheads for industry standard cryptographic algorithms. Due to the possibility of removing random injections using large number of samples (due to the random nature, a large number of samples will eliminate noise), the author proposes a multiprocessor 'algorithmic' balancing technique. This technique uses a dual processor architecture where two processors execute the same program in parallel, but with complementary intermediate data, thus balancing the bitflips. The second processor works in conjunction with the first processor for balancing only when encryption is performed, and both processors carry out independent tasks when no encryption is being performed. Both DES and AES cryptographic programs are investigated for balancing and the author shows that this technique is economical, while completely preventing power analysis attacks. The signature detection unit to capture encryption is also utilised, which is used in the instruction injection approach. This multiprocessor balancing approach reduces performance by 0.42% and 0.94% for AES and DES respectively. The hardware increase is 2X only when balancing is performed. Further, several future extensions for the balancing approach are proposed, by introducing random swapping of encryption iterations between cores. FPGA implementations of these processor designs are briefly described at the end of this thesis.

Master of Engineering by Research / As a multi-carrier modulation scheme, Orthogonal Frequency Division Multiplexing (OFDM) technique can achieve high data rate in frequency-selective fading channels by splitting a broadband signal into a number of narrowband signals over a number of subcarriers, where each subcarrier is more robust to multipath. The wireless communication system with multiple antennas at both the transmitter and receiver, known as multiple-input multiple-output (MIMO) system, achieves high capacity by transmitting independent information over different antennas simultaneously. The combination of OFDM with multiple antennas has been considered as one of most promising techniques for future wireless communication systems. The challenge in the detection of a space-time signal is to design a low-complexity detector, which can efficiently remove interference resulted from channel variations and approach the interference-free bound. The application of iterative parallel interference canceller (PIC) with joint detection and decoding has been a promising approach. However, the decision statistics of a linear PIC is biased toward the decision boundary after the first cancellation stage. In this thesis, we employ an iterative receiver with a decoder metric, which considerably reduces the bias effect in the second iteration, which is critical for the performance of the iterative algorithm. Channel state information is required in a MIMO-OFDM system signal detection at the receiver. Its accuracy directly affects the overall performance of MIMO-OFDM systems. In order to estimate the channel in high-delay-spread environments, pilot symbols should be inserted among subcarriers before transmission. To estimate the channel over all the subcarriers, various types of interpolators can be used. In this thesis, a linear interpolator and a trigonometric interpolator are compared. Then we propose a new interpolator called the multi-tap method, which has a much better system performance. In MIMO-OFDM systems, the time-varying fading channels can destroy the orthogonality of subcarriers. This causes serious intercarrier interference (ICI), thus leading to significant system performance degradation, which becomes more severe as the normalized Doppler frequency increases. In this thesis, we propose a low-complexity iterative receiver with joint frequency- domain ICI cancellation and pilot-assisted channel estimation to minimize the effect of time-varying fading channels. At the first stage of receiver, the interference between adjacent subcarriers is subtracted from received OFDM symbols. The parallel interference cancellation detection with decision statistics combining (DSC) is then performed to suppress the interference from other antennas. By restricting the interference to a limited number of neighboring subcarriers, the computational complexity of the proposed receiver can be significantly reduced. In order to construct the time variant channel matrix in the frequency domain, channel estimation is required. However, an accurate estimation requiring complete knowledge of channel time variations for each block, cannot be obtained. For time- varying frequency-selective fading channels, the placement of pilot tones also has a significant impact on the quality of the channel estimates. Under the assumption that channel variations can be approximated by a linear model, we can derive channel state information (CSI) in the frequency domain and estimate time-domain channel parameters. In this thesis, an iterative low-complexity channel estimation method is proposed to improve the system performance. Pilot symbols are inserted in the transmitted OFDM symbols to mitigate the effect of ICI and the channel estimates are used to update the results of both the frequency domain equalizer and the PICDSC detector in each iteration. The complexity of this algorithm can be reduced because the matrices are precalculated and stored in the receiver when the placement of pilots symbols is fixed in OFDM symbols before transmission. Finally, simulation results show that the proposed MIMO-OFDM iterative receiver can effectively mitigate the effect of ICI and approach the ICI-free performance over time-varying frequency-selective fading channels.

Thesis (Ph.D.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (ℓ. 104-128)

Dissertation (Ph.D.)--Auburn University, 2006. / Abstract. Vita. Includes bibliographic references.

Thesis(M.S.)--Auburn University, 2005. / Abstract. Vita. Includes bibliographic references.

Dissertation (Ph.D.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references.

Thesis (Ph. D.)--Auburn University, 2008. / Abstract. Vita. Includes bibliographical references (p. 51-54).