ElectroMagnetic Interferences (EMI) are emerging problems in today's high speed circuits. There are several examples that these interferences affected the circuits and systems. This work tries to reduce the abovementioned problems in synchronous systems by modifying the clock signal such that it produces less interferers. In this thesis first EMI and its sources and related definitions are studied in Chap.1 and then a theoretical background is presented in Chap.2, finally Chap.3 and Chap.4 are dedicated to circuit implementation and simulation results, respectively. A novel multi-segment clocking scheme is presented in this thesis. An analytical methods for formal verification of advantages of this clocking method is presented in Chap.2. Chap.3 and Chap.4 also are devoted to implementation, simulation and comparison of proposed clocking method versus other methods. Since proposed clocking method does not set any constraint on timing (speed of the circuit) and does not impose very high extra power consumption on the circuit, compared to the conventional clocking, this method could be used to reduce interferences in system.