Wong Chun Kit. / Thesis submitted in: October 2006. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 73-76). / Abstracts in English and Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Background and Motivation --- p.1 / Chapter 1.2 --- Objectives --- p.4 / Chapter 1.3 --- Contributions --- p.4 / Chapter 1.4 --- Thesis Outline --- p.5 / Chapter 2 --- Digital Signal Processing --- p.6 / Chapter 2.1 --- Introduction --- p.6 / Chapter 2.2 --- Discrete-time Signals and Systems --- p.7 / Chapter 2.2.1 --- Discrete-time Signals --- p.7 / Chapter 2.2.2 --- Discrete-time Signal Processing Systems --- p.9 / Chapter 2.2.3 --- Linear Time-Invariant (LTI) Systems --- p.10 / Chapter 2.3 --- Finite Impulse Response (FIR) Filters --- p.13 / Chapter 2.3.1 --- Introduction --- p.13 / Chapter 2.3.2 --- Windowing FIR Filter Design Method --- p.15 / Chapter 2.4 --- Infinite Impulse Response (IIR) Filters --- p.17 / Chapter 2.4.1 --- Introduction --- p.17 / Chapter 2.4.2 --- Bilinear Transform IIR Filter Design Method --- p.18 / Chapter 2.4.3 --- Spectral Transformations of IIR Filters --- p.22 / Chapter 2.5 --- Comparison on FIR and IIR Filters --- p.25 / Chapter 2.6 --- Digital Signal Resampling --- p.26 / Chapter 2.6.1 --- Introduction --- p.26 / Chapter 2.6.2 --- Resampling by Decimation --- p.26 / Chapter 2.6.3 --- Resampling by Interpolation --- p.28 / Chapter 2.6.4 --- Resampling by a Rational Factor --- p.29 / Chapter 2.7 --- Introduction to Dual Fixed-point (DFX) Representation --- p.30 / Chapter 2.8 --- Summary --- p.33 / Chapter 3 --- Lyon and Mead's Cochlea Model --- p.34 / Chapter 3.1 --- Introduction --- p.34 / Chapter 3.2 --- Digital Cochlea Model: Cascaded IIR Filters --- p.37 / Chapter 3.2.1 --- Introduction --- p.37 / Chapter 3.2.2 --- Bandwidth and Centre frequencies --- p.38 / Chapter 3.2.3 --- Zeros and Poles --- p.39 / Chapter 3.3 --- Modifications for Decimated Cochlea Model --- p.41 / Chapter 3.3.1 --- Introduction --- p.41 / Chapter 3.3.2 --- Aliasing Avoidance --- p.42 / Chapter 3.3.3 --- Coefficient Modification after Decimation --- p.43 / Chapter 3.4 --- Summary --- p.47 / Chapter 4 --- System Architecture --- p.48 / Chapter 4.1 --- Introduction --- p.48 / Chapter 4.2 --- Hardware Platform and CAD Tools --- p.48 / Chapter 4.3 --- Sequential Processing Electronic Cochlea --- p.51 / Chapter 4.3.1 --- Pipelining - An Interleaving Scheme --- p.53 / Chapter 4.3.2 --- Decimation in Sequential Processing Electronic Cochlea . --- p.54 / Chapter 4.3.3 --- Multiple Sequential Cores --- p.55 / Chapter 4.3.4 --- Architecture of the DFX Filter Computation Core --- p.55 / Chapter 4.4 --- Summary --- p.60 / Chapter 5 --- Experimental Results --- p.61 / Chapter 5.1 --- Introduction --- p.61 / Chapter 5.2 --- Testing Environment --- p.61 / Chapter 5.3 --- Performance of the Sequential Electronic Cochlea --- p.63 / Chapter 5.3.1 --- Comparisons --- p.63 / Chapter 5.4 --- Summary --- p.69 / Chapter 6 --- Conclusions --- p.70 / Chapter 6.1 --- Future Work --- p.72 / Bibliography --- p.73