Incandescent lamps are now being gradually replaced by Compact Fluorescent Lamps (CFLs) as CFLs consume less power to produce the same light output and its lifetime is much longer than that of an incandescent lamp. However, current CFLs have the following drawbacks: (1) the line current drawn from the CFL produce a large amount of unwanted harmonics that results in very poor input power factor; (2) the dimming performance of a CFL with conventional incandescent lamp dimmers is very poor. The performance of the CFL depends on the design of the electronic ballast circuit that is located at the base of each CFL. For a CFL electronic ballast to be practical, its size and cost is of utmost importance. Thus, the main challenge in the design of practical dimmable CFL ballasts is to solve the aforementioned CFL performance issues while minimizing its size and cost. In the first part of this dissertation, two novel high power factor single-stage electronic ballast topologies are proposed to solve the poor power factor issue of the CFLs that are currently on the market. Both proposed circuits have the following advantages: (1) only one switch is required in the power circuit; (2) the switch has both lower current and voltage stress than other conventional circuits; (3) the built-in power factor correction (PFC) circuit allows incandescent phase-cut dimmer to be used for dimming the CFL; (4) the circuit design is simple and it requires less system space compared to other conventional high PF electronic ballast topologies. The second part of this dissertation proposes a new control circuit that enables the lamp to maintain high power factor throughout the majority of the dimming range. In the proposed control scheme, the dimmer phase-cut angle is fed-forward to the control circuit. The controller then determines the proper duty cycle based on the phase-cut angle to facilitate the desired dimming operation. This novel control circuit was first implemented using analog circuitry. After assessing the performance of the analog version of the proposed controller, it was then digitally implemented through the Field Programmable Gate Array (FPGA) technique. The feasibility and performance of both the proposed electronic ballasts and control concept have been verified through theoretical analysis, simulation and experimental results on a 13W 4-pin D/E CFL from Osram Sylvania. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2010-04-30 12:51:59.682

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Power system harmonics and interharmonics are power quality concerns that have received a great deal of attention in recent years. These phenomena can have several adverse effects on power system operation. The main harmonic and interharmonic sources are devices based on power electronics. An emerging class of harmonic sources is comprised of power electronic-based home appliances. These appliances are dispersed throughout the low-voltage distribution system, and their collective impact can result in unacceptable levels of voltage distortion. The characterization of home appliances based on their harmonic currents is an important step toward understanding the impact of these devices. This thesis presents an evaluation of the relative severity of the harmonic currents from these devices, and the impact of the disparity of the harmonic current phase angles. Typically, the voltage supplied to each harmonic source is already distorted. This distortion causes a change of the harmonic current magnitudes (traditionally referred to as the attenuation effect). Common harmonic analysis methods cannot take this variation into account because they use a typical harmonic current source model specified by a supply voltage having little or no distortion. This thesis characterizes the harmonic attenuation effect of power electronic-based appliances. One of the findings is that harmonic amplification, rather than attenuation, can occur under credible voltage conditions. This finding had not been made previously. In order to include the harmonic attenuation/amplification in appliance modeling, a measurement-based harmonic modeling technique is proposed. One of the most economic and effective ways to mitigate harmonics in power systems is through the use of harmonic shunt passive filters. These filters can be of many topologies. Selecting these topologies is a task that, today, depends on the experience and judgment of the filter designer. An investigation is carried out on the common filter topologies, and the most cost-effective topologies for mitigating harmonics are identified. As many of the larger harmonic loads also generate interharmonics, interharmonics have become prevalent in today’s medium-voltage distribution system. Mitigation cannot be carried out until the interharmonic-source location is known. A method for interharmonic source determination is proposed and then verified through simulation and field measurement studies.