Abstract not available

Computing devices are pervading our everyday life and imposing challenges for designers that have the responsibility of producing reliable hardware and software systems. As systems grow in size and complexity, it becomes increasingly difficult to verify whether a design works as intended. Conventional verification methods, such as simulation and testing, exercise only parts of the system and from these parts, draw conclusions about the correctness of the total design. For complex designs, the parts of the system that can be verified are relatively small. Formal verification aims to overcome this problem. Instead of exercising the system, formal verification builds mathematical models of designs and proves whether properties hold in these models. In doing so, it at least aims to cover the complete design. Model checking is a formal verification method that automatically verifies a model of a design, or generates diagnostic information if the model cannot be verified. It is because of this usability and level of automation that model checking has gained a high degree of success in verifying circuit designs. The major disadvantage of model checking is its poor scalability. This is due to its algorithmic nature: namely, every state of the model needs to be enumerated. In practice, properties of interest may not need the exhaustive enumeration of the model state space. Many properties can be verified (or falsified) by examining a small number of states. In such cases, exhaustive algorithms can be replaced with search algorithms that are directed by heuristics. Methods based on heuristics generally scale well. This thesis investigates non-exhaustive model checking algorithms and focuses on error detection in system verification. The approach is based on a novel integration of symbolic model checking, heuristic search and abstraction techniques to produce a framework that we call abstractiondirected model checking. There are 3 main components in this framework. First, binary decision diagrams (BDDs) and heuristic search are combined to develop a symbolic heuristic search algorithm. This algorithm is used to detect errors. Second, abstraction techniques are applied in an iterative way. In the initial phase, the model is abstracted, and this model is verified using exhaustive algorithms. If a definitive verification result cannot be obtained, the same abstraction is re-used to generate a search heuristic. The heuristic in turn is used to direct a search algorithm that searches for error states in the concrete model. Third, a model transformation mechanism converts an arbitrary branching-time property to a reachability property. Essentially, this component allows this framework to be applied to a more general class of temporal property. By amalgamating these three components, the framework offers a new verification methodology that speeds up error detection in formal verification. The current implementation of this framework indicates that it can outperform existing standard techniques both in run-time and memory consumption, and scales much better than conventional model checking.

Until now the topic of motion estimation, as used in video compression, has been dominated by search methodologies which are modifications of an exhaustive search. This research takes a completely new approach by applying two evolvable search algorithms, the Genetic Algorithm and the Genetic Program, to the area of motion estimation. The main purpose of this research is to determine the applicability of evolvable search methods to the topic of motion estimation. Several methods are studied: in the first application, a Genetic Algorithm is used to determine individual motion vectors one at a time, while the second method explores the use of a Genetic Algorithm to search for all of the motion vectors to correlate two frames simultaneously. To reduce the number of motion vectors required, Genetic Programming is applied to variable block size motion estimation. Finally, this work is expanded by applying it to region motion estimation, which is not restricted to using square or rectangular motion blocks. / Graduation date: 1998

Computer and network security systems rely on the privacy and authenticity of information, which requires implementation of cryptographic functions. Software implementations of these functions are often desired because of their flexibility and cost effectiveness. In this study, we concentrate on developing high-speed and area-efficient modular multiplication and exponentiation algorithms for number-theoretic cryptosystems. The RSA algorithm, the Diffie-Hellman key exchange scheme and Digital Signature Standard require the computation of modular exponentiation, which is broken into a series of modular multiplications. One of the most interesting advances in modular exponentiation has been the introduction of Montgomery multiplication. We are interested in two aspects of modular multiplication algorithms: development of fast and convenient methods on a given hardware platform, and hardware requirements to achieve high-performance algorithms. Arithmetic operations in the Galois field GF(2[superscript]k) have several applications in coding theory, computer algebra, and cryptography. We are especially interested in cryptographic applications where k is large, such as elliptic curve cryptosystems. / Graduation date: 1998

Thesis (Ph. D.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 125-128). Also available on the World Wide Web.

Thesis (M.E.E.)--University of Delaware, 2006. / Principal faculty advisor: Gonzalo R. Arce, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

Thesis (Ph. D.)--Ohio State University, 2006. / Title from first page of PDF file. Includes bibliographical references (p. 107-113).

Thesis (Ph. D.)--University of Hong Kong, 2001. / Includes bibliographical references (leaves 68-70) and index.

Thesis (Ph. D.)--University of Hong Kong, 2001. / Includes bibliographical references (leaves 101-113).

Thesis (M.S.)--Worcester Polytechnic Institute. / Keywords: multimedia; disk scheduling; admission control. Includes bibliographical references (p. 135-138).