Thesis (M.S.)--Ohio University, November, 1993. / Title from PDF t.p.

Dissertation (Ph.D.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (p.111-129).

Thesis (Ph. D.)--University of Washington, 1997. / Vita. Includes bibliographical references (p. [196]-207).

Thesis (M.S.)--Rochester Institute of Technology, 1983. / Typescript. Includes bibliographical references (leaves 97-101).

Thesis (M.S.)--Rochester Institute of Technology, 1987. / Typescript. Includes bibliographical references (leaves 53-54).

Thesis (Ph. D.)--Ohio State University, 2004. / Title from first page of PDF file. Document formatted into pages; contains xx, 165 p.; also includes graphics. Includes bibliographical references (p. 157-165).

Thesis (Ph. D.)--Georgia State University, 2007. / Rajshekhar Sunderraman, committee chair; Paul S. Katz, Yanqing Zhang, Ying Zhu, committee members. Electronic text (128 p. : ill.) : digital, PDF file. Description based on contents viewed Oct. 15, 2007; title from file title page. Includes bibliographical references (p. 124-128).

In this dissertation we present two techniques on the topic of digital interface design: a probabilistic timing verification and a timing analysis for synthesis, both rooted in a formal specification. Interface design arises when two digital components (e.g., a processor and a memory device) are to be interconnected to build up a system. We have extended a Petri net specification to describe the temporal behavior of the interface protocols of digital components. The specification describes circuit delays as random variables thus making it suitable to model process variations and timing correlation. Interface probabilistic timing verification checks that a subsystem, composed of components to be interconnected and the associated interface logic, satisfies the timing constraints specified by the components' specifications. Our verification technique not only yields tighter results than previous techniques that do not take timing correlation into consideration but also, if the timing constraint is not satisfied, determines the probability that a constraint will be violated. The second technique, timing analysis for synthesis, finds tight bounds on the delays of the interface logic, which are unknown prior to synthesis, such that all the timing constraints given in the component specifications are satisfied. / Graduate

Modern communication protocols present the software designer with problems of asynchrony, real-time response, high throughput, robust exception handling, and multi-level interfacing. An operating system which provides lightweight processes and inexpensive inter-process communication offers solutions to all of these problems. This thesis examines the use of the multi-process structuring facilities of one such operating system, Verex, to implement the protocols defined by CCITT Recommendation X.25. The success of the multi-process design is confirmed by a working implementation that has linked a Verex system to the Datapac public network for over a year. The processes which make up the Verex X.25 software are organized into layers according to the layered definition of X.25. Within the layers, some processes take the form of finite-state machines which execute the state transitions specified in the protocol definition. Matching the structure of the software to the structure of the specification results in software which is easy to program, easy to understand, and likely to be correct. Multi-process structuring can be applied with similar benefits to protocols other than X.25 and systems other than Verex. / Science, Faculty of / Computer Science, Department of / Graduate

Accessibility and usability of software define the programs used for both professional and academic activities. While many proprietary tools are easy to grasp, some challenges exist in using more technical resources, such as the statistical programming language R. The creative project tidyTouch is a web application designed to help educate any user in basic R data visualization and transformation using the popular ggplot2 and dplyr packages. Providing point-and-click interactivity to explore potential modifications of graphics for data presentation, the application uses an intuitive interface to make R more accessible to those without programming experience. This project is in a state of continual development and will expand to cover introductory data science topics relevant to academics and professionals alike. The code for tidyTouch and this document can be found at https://github.com/devaneyJE/tidyTouch_thesis (see ui.R and server.R files for application code).