SADDAS, a. Self-contained Analog to Digital Data Acquisition System, converts analog voltage inputs to formatted BCD (binary coded decimal digital magnetic tape. SADDAS consists of a 16 channel multiplexer, a 17 bit (4 digits + sign) 40 microsecond analog to digital converter, a 512 byte 8 bit core memory, a 30 IPS (inches per second) digital tape recorder at a density of 556 cpi (characters per inch), and a controller which integrates these instruments into a flexible and easy-to-use system. Sampling rates in excess of 360 samples per second may be used when converting seven channels of data, such as IRIG (Inter Range Instrumentation Group) analog magnetic tapes.

In recent years with the exponential growth in web-based applications the amount of data generated has increased tremendously. Quick and accurate analysis of this 'big data' is indispensable to make better business decisions and reduce operational cost. The challenges faced by modern day data centers to process big data are multi fold: to keep up the pace of processing with increased data volume and increased data velocity, deal with system scalability and reduce energy costs. Today's data centers employ a variety of distributed computing frameworks running on a cluster of commodity hardware which include general purpose processors to process big data. Though better performance in terms of big data processing speed has been achieved with existing distributed computing frameworks, there is still an opportunity to increase processing speed further. FPGAs, which are designed for computationally intensive tasks, are promising processing elements that can increase processing speed. In this thesis, we discuss how FPGAs can be integrated into a cluster of general purpose processors running iterative algorithms and obtain high performance. In this thesis, we designed a heterogeneous cluster comprised of FPGAs and CPUs and ran various benchmarks such as PageRank, Katz and Connected Components to measure the performance of the cluster. Performance improvement in terms of execution time was evaluated against a homogeneous cluster of general purpose processors and a homogeneous cluster of FPGAs. We built multiple four-node heterogeneous clusters with different configurations by varying the number of CPUs and FPGAs. We studied the effects of load balancing between CPUs and FPGAs. We obtained a speedup of 20X, 11.5X and 2X for PageRank, Katz and Connected Components benchmarks on a cluster cluster configuration of 2 CPU + 2 FPGA for an unbalancing ratio against a 4-node homogeneous CPU cluster. We studied the effect of input graph partitioning, and showed that when the input is a Multilevel-KL partitioned graph we obtain an improvement of 11%, 26% and 9% over randomly partitioned graph for Katz, PageRank and Connected Components benchmarks on a 2 CPU + 2 FPGA cluster.

Disasters are characterized by large numbers of victims and required resources, overwhelming the available resources. Disaster response involves various entities like Incident Commanders, dispatch centers, emergency operations centers, area command and hospitals. An effective emergency response system should facilitate coordination between these various entities. Victim triage, emergency resource allocation and victim dispatch to hospitals form an important part of an emergency response system. In this present research effort, an emergency response system with the aforementioned components is developed. Triage is the process of prioritizing mass casualty victims based on severity of injuries. The system presented in this thesis is a low-cost victim triage system with RFID tags that aggregate all victim information within a database. It will allow first responders' movements to be tracked using GPS. A web-based real time resource allocation tool that can assist the Incident Commanders in resource allocation and transportation for multiple simultaneous incidents has been developed. This tool ensures that high priority resources at emergency sites are received in least possible time. This web-based tool also computes the patient dispatch schedule from each disaster site to each hospital. Patients are allocated to nearest hospitals with available medical facilities. This tool can also assist resource managers in emergency resource planning by computing the time taken to receive required resources from the nearest depots using Google Maps. These web-based tools complements emergency response systems by providing decision-making capabilities.

ABSTRACT A REAL TIME INDOOR NAVIGATION AND MONITORING SYSTEM FOR FIREFIGHTERS AND VISUALLY IMPAIRED MAY 2011 SIDDHESH RAJAN GANDHI M.S. E.C.E, UNIVERSITY OF MASSACHUSETTS AMHERST Directed by: Professor Aura Ganz There has been a widespread growth of technology in almost every facet of day to day life. But there are still important application areas in which technology advancements have not been implemented in a cost effective and user friendly manner. Such applications which we will address in this proposal include: 1) indoor localization and navigation of firefighters during rescue operations and 2) indoor localization and navigation for the blind and visually impaired population. Firefighting is a dangerous job to perform as there can be several unexpected hazards while rescuing victims. Since the firefighters do not have any knowledge about the internal structure of the fire ridden building, they will not be able to find the location of the EXIT door, a fact that can prove to be fatal. We introduce an indoor location tracking and navigation system (FIREGUIDE) using RFID technology integrated with augmented reality. FIREGUIDE assists the firefighters to find the nearest exit location by providing the navigation instructions to the exits as well as an Augmented Reality view of the location and direction of the exits. The system also presents the Incident Commander the current firefighter’s location superimposed on a map of the building floor. We envision that the FIREGUIDE system will save a significant number of firefighters and victims’ lives. Blind or visually impaired people find it difficult to navigate independently in both outdoor and indoor environments. The outdoor navigation problem can be solved by using systems that have GPS support. But indoor navigation systems for the blind or visually impaired are still a challenge to conquer, given the requirements of low cost and user friendly operation. In order to enhance the perception of indoor and unfamiliar environments for the blind and visually-impaired, as well as to aid in their navigation through such environments, we propose a novel approach that provides context–aware navigation services. INSIGHT uses RFID (Radio Frequency Identification), and tagged spaces (audio landmarks), enabling a ubiquitous computing system with contextual awareness of its users while providing them persistent and context-aware information. We present INSIGHT system that supports a number of unique features such as: a) Low deployment and maintenance cost; b) Scalability, i.e. we can deploy the system in very large buildings; c) An on-demand system that does not overwhelm the user, as it offers small amounts of information on demand; and d) Portability and ease-of-use, i.e., the custom handheld device carried by the user is compact and instructions are received audibly.

Strategies for software development often slight security-related considerations, due to the difficulty of developing realizable requirements, identifying and applying appropriate techniques, and teaching secure design. This work describes a three-part strategy for addressing these concerns. Part 1 provides detailed questions, derived from a two-level characterization of system security based on work by Chung et. al., to elicit precise requirements. Part 2 uses a novel framework for relating this characterization to previously published strategies, or patterns, for secure software development. Included case studies suggest the framework's effectiveness, involving the application of three patterns for secure design (Limited View, Role-Based Access Control, Secure State Machine) to a production system for document management. Part 3 presents teaching modules to introduce patterns into lower-division computer science courses. Five modules, integer over ow, input validation, HTTPS, les access, and SQL injection, are proposed for conveying an aware of security patterns and their value in software development.

During development and testing of the functionality of the pacemaker and defibrillator device, engineers in the St. Jude Medical Cardiac Rhythm Management Division use an in-house development tool called Universal Engineering Programmer (UEP) to ensure the device functions as expected, before it can be used to test on an animal or a human during the implantation process. In addition, some applications of UEP are incorporated into the official releases of the device product. UEP has been developed and used by engineers across departments in the St. Jude Medical Cardiac Rhythm Management Division (CRMD). This thesis covers the flexible and reusable design and implementation of UEP features, to allow engineers to easily and effectively develop and test the devices.

This paper presents DSM64: a lazy release consistent software distributed shared memory (SDSM) system built entirely in user-space. The DSM64 system is capable of executing threaded applications implemented with pthreads on a cluster of networked machines without any modifications to the target application. The DSM64 system features a centralized memory manager [1] built atop Hoard [2, 3]: a fast, scalable, and memory-efficient allocator for shared-memory multiprocessors. In my presentation, I present a SDSM system written in C++ for Linux operating systems. I discuss a straight-forward approach to implement SDSM systems in a Linux environment using system-provided tools and concepts avail- able entirely in user-space. I show that the SDSM system presented in this paper is capable of resolving page faults over a local area network in as little as 2 milliseconds. In my analysis, I present the following. I compare the performance characteristics of a matrix multiplication benchmark using various memory coherency models. I demonstrate that matrix multiplication benchmark using a LRC model performs orders of magnitude quicker than the same application using a stricter coherency model. I show the effect of coherency model on memory access patterns and memory contention. I compare the effects of different locking strategies on execution speed and memory access patterns. Lastly, I provide a comparison of the DSM64 system to a non-networked version using a system-provided allocator.

CubeSat satellites have redefined the standard solution for conducting missions in space due to their unique form factor and cost. The harsh environment of space necessitates examining features that improve satellite robustness and ultimately extend lifetime, which is typical and vital for mission success. The CubeSat development team at Cal Poly, PolySat, has recently redefined its standard avionics platform to support more complex mission capabilities with this robustness in mind. A significant addition was the integration of the Linux operating system, which provides the flexibility to develop much more elaborate protection mechanisms within software, such as support for remote on-orbit software updates. This thesis details the design and development of such a feature-set with critical software recovery and multiple-mission single-CubeSat functionality in mind. As a result, features that focus on software update usability, validation, system recovery, upset tolerance, and extensibility have been developed. These include backup Linux kernel and file system image availability, image validation prior to boot, and the use of multiple file system devices to protect against system upsets. Furthermore, each feature has been designed for usability on current and future missions.

Authentication is the vital link between your real self and your digital self. As our digital selves become ever more powerful, the price of failing authentication grows. The most common authentication protocols are static data and employed only once at login. This allows for authentication to be spoofed just once to gain access to an entire user session. Behaviometric protocols continuously consume a user’s behavior as a token of authentication and can be applied throughout a session, thereby eliminating a fixed token to spoof. Research into these protocols as viable forms of authentication is relatively recent and is being conducted on a variety of data sources, features and classification schemes. This work proposes an extensible research framework to aid the systemization and preservation of research in this field by standardizing the interface for raw data collection, processing and interpretation. Specifically, this framework contributes transparent management of data collection and persistence, the presentation of past research in a highly configurable and extensible form, and the standardization of data forms to enhance innovative reuse and comparative analysis of prior research.

The processing of digital video has long been a significant computational task for modern x86 processors. With every video frame composed of one to three planes, each consisting of a two-dimensional array of pixel data, and a video clip comprising of thousands of such frames, the sheer volume of data is significant. With the introduction of new high definition video formats such as 4K or stereoscopic 3D, the volume of uncompressed frame data is growing ever larger. Modern CPUs offer performance enhancements for processing digital video through SIMD instructions such as SSE2 or AVX. However, even with these instruction sets, CPUs are limited by their inherently sequential design, and can only operate on a handful of bytes in parallel. Even processors with a multitude of cores only execute on an elementary level of parallelism. GPUs provide an alternative, massively parallel architecture. GPUs differ from CPUs by providing thousands of throughput-oriented cores, instead of a maximum of tens of generalized “good enough at everything” x86 cores. The GPU’s throughput-oriented cores are far more adept at handling large arrays of pixel data, as many video filtering operations can be performed independently. This computational independence allows for pixel processing to scale across hun- dreds or even thousands of device cores. This thesis explores the utilization of GPUs for video processing, and evaluates the advantages and caveats of porting the modern video filtering framework, Vapoursynth, over to running entirely on the GPU. Compute heavy GPU-enabled video processing results in up to a 108% speedup over an SSE2-optimized, multithreaded CPU implementation.