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Constructing adaptable and scalable synthetic benchmarks for microprocessor performance evaluationJoshi, Ajay Manohar, January 1900 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.
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An extensible, scalable microprocessor architecture /Dinmore, Matthew. January 1993 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 1993. / Typescript. Includes bibliographical references (leaves 91-92).
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Scalable primary cache memory architecturesAgarwal, Vikas. John, Lizy Kurian, Keckler, Stephen W., January 2004 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisors: Lizy K. John and Stephen W. Keckler. Vita. Includes bibliographical references.
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OS-aware architecture for improving microprocessor performance and energy efficiencyLi, Tao, John, Lizy Kurian, January 2004 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisor: Lizy K. John. Vita. Includes bibliographical references. Also available from UMI.
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Complex streamed media processor architecture /Cheresiz, Dmitry, January 1900 (has links)
Thesis (doctoral)--Universiteit Leiden, 2003. / "Proefschrift." "Complex Streamed Instruction Set (CSI)"--Pref. Includes bibliographical references (p. 142-146).
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Generic telecommunications protocol processor; a programmable architecture.Taylor, Rawdon J. W. January 1900 (has links)
Thesis (M. Eng.)--Carleton University, 1999. / Also available in electronic format on the Internet.
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