The aim of the research is to investigate factors that may explain success in elementary computer programming at the tertiary level. The first phase of the research included the identification of possible explanatory factors through a literature review, a survey of students studying introductory computing, a focus-group session with teachers of computer programming and interviews with programming students. The second phase of the research that was called the main study, involved testing the identified factors. Two different groups of programming students - one group majoring in business computing and another majoring in computer science - completed a survey questionnaire. The findings of the research are as follows. Gender is of little significance for business students but there is an adverse gender penalty for females in computer science. Secondary school assessment is inversely related to outcomes in business computing but directly influences outcomes in the first programming unit in the computer science course. As in prior research, previous knowledge and experience were demonstrated to matter, A range of other variables was found to be of little importance. The research suggests that different problem-solving techniques might be relevant in business compared with those of use in computer science.

Thesis (M. Sc.)--University of Hong Kong, 2002. / Includes bibliographical references (leaves 83-86).

Thesis (M. Sc.)--University of Hong Kong, 2002. / Includes bibliographical references (leaves 116-120).

The problem of this study concerns the performance of students in computer programming following exposure to a computer-aided instruction (CAI) drill in sequencing and practice exercises. The purpose of this study was to determine whether or not student success rates improve in computer programming after completing CAI sequencing drills and practice exercises.

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The robust symmetrical number system (RSNS) can play a significant role in the reduction of encoding errors within a low-power folding analog-to-digital converter (ADC). A key part of this ADC design is the logic block that converts the symmetrical residues from each channel into a more convenient binary output. This thesis describes a robust symmetrical residue-to-binary conversion algorithm for moduli 1 7 m =, 2 8 m = and 3 9 m = (ADC dynamic range M = 126). Also described is a pipelined digital logic implementation for use in high speed programmable logic or application specific integrated circuits. To verify correct outputs of the robust symmetrical residue-to-binary conversion algorithm, a digital test circuit is described that generates the thermometer code (symmetrical residues) for the 3-channel ADC design.

Zhang, Qirun. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2013. / Includes bibliographical references (leaves 170-186). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstracts also in Chinese.

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Typescript (photocopy). / Digitized by Kansas Correctional Industries / Department: Computer Science.