Spelling suggestions: "subject:"computeraided design,"" "subject:"computerizide design,""
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Hollowing and reinforcing 3D CAD models and representing multiple material objects for rapid prototypingChiu, Wai-kei., 趙偉奇. January 2000 (has links)
published_or_final_version / abstract / toc / Mechanical Engineering / Doctoral / Doctor of Philosophy
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Circuit modules design using a hierarchical, automated design flowYang, Xin, 楊欣 January 2003 (has links)
published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy
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A LISP-based shell for model structuring in system designPan, Ning, 1962- January 1989 (has links)
This thesis builds a knowledge-based, computer-aided decision making shell, written in LISP, for assistance in generic engineering system design problems. The theoretical framework presented in the thesis places system design processes in the environment of multifaceted modelling methodology and artificial intelligence techniques. A new reliable and efficient knowledge representation scheme--FRASES is introduced into the knowledge base design. The scheme combines system entity structure and frame and production rule system, and allows us to easily acquire, represent, and infer knowledge and information about the system being designed. In the design of the inference engine, multiple inference algorithms are supported in the shell. They infer a set of desired system configurations with respect to the designer's objectives and requirements. In comparison, top-down reasoning with depth-first offers the most efficient reasoning algorithm when using the FRASES knowledge representation scheme.
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An investigation into information technology and related factors, and their effect on the UK structural engineering professionGardner, Peter John January 1998 (has links)
No description available.
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The application of information systems analysis to the activity of the design of complex systemsFinkelstein, A. C. W. January 1985 (has links)
No description available.
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Incorporating Physical Information into Clustering for FPGAsChen, Doris Tzu Lang January 2007 (has links)
The traditional approach to FPGA clustering and CLB-level placement has been shown to yield significantly worse overall placement quality than approaches which allow BLEs to move during placement. In practice, however, modern FPGA architectures require computationally-expensive Design Rule Checks (DRC) which render BLE-level placement impractical.
This thesis research addresses this problem by proposing a novel clustering framework
that produces better initial clusters that help to reduce the dependence on BLE-level placement. The work described in this dissertation includes: (1) a
comparison of various clustering algorithms used for FPGAs, (2) the introduction of a novel hybridized clustering framework for timing-driven FPGA clustering, (3) the addition of physical information to make better clusters, (4) a comparison of the implemented approaches to known clustering
tools, and (5) the implementation and evaluation of cluster improvement heuristics. The proposed techniques are quantified across accepted benchmarks and show that the implemented DPack produces results with 16% less wire length, 19% smaller minimum channel
widths, and 8% less critical delay, on average, than known academic tools. The hybridized approach, HDPack, is found to achieve 21% less wire length, 24% smaller minimum channel widths, and 6% less critical delay, on average.
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A computational tool for the rapid design and prototyping of propellers for underwater vehiclesD'Epagnier, Kathryn Port. 09 1900 (has links)
An open source, MATLAB (trademarked)-based propeller design code MPVL was improved to include rapid prototyping capabilities as well as other upgrades as part of this effort. The resulting code, OpenPVL is described in this thesis. In addition, results from the development code BasicPVL are presented. An intermediate code, BasicPVL, was created by the author while OpenPVL was under development, and it provides guidance for initial propeller designs and propeller efficiency analysis. OpenPVL is part of the open source software suite of propeller design codes, Openprop. OpenPVL is in the form of a Graphical User Interface (GUI) which features both a parametric design technique and a single propeller geometry generator. This code combines a user-friendly interface with a highly modifiable platform for advanced users. This tool offers graphical propeller design feedback while recording propeller input, output, geometry, and performance. OpenPVL features the ability to translate the propeller design geometry into a file readable by a Computer Aided Design (CAD) program and converted into a 3D-printable file. Efficient propellers reduce the overall power requirements for Autonomous Underwater Vehicles (AUVs), and other propulsion-powered vehicles. The focus of this study is based on the need of propeller users to have an open source computer-based engineering tool for the rapid design of propellers suited to a wide range of underwater vehicles. Propeller vortex lattice lifting line (PVL) code in combination with 2D foil theory optimizes propeller design for AUVs. Several case studies demonstrate the functionality of OpenPVL, and serve as guides for future propeller designs. The first study analyzes propeller thruster performance characteristics for an off-the-shelf propeller, while the second study demonstrates the process for propeller optimization-from the initial design to the final file that can be read by a 3D printer. / Contract number: N62771-97-G-0026 / US Naval Academy (USNA) author.
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'n Nuwe tipe aandryfstelsel met mikrorekenaarbeheer, elektroniese wisselrigters en induksiemasjiene vir elektriese rolstoele met batterye17 November 2014 (has links)
M.Ing. (Electrical And Electronic) / Because of the high costs of available wheelchair drive systems, an investigation into an alternative drive system was undertaken. Three phase cage rotor induction machines were selected as the most suitable replacement for the current DC machines, having less maintenance requirements and costing less to manufacture. The 24V DCsupplied by the on board battery is converted to three phase alternating current with variable amplitude and frequency by means of a MOSFET inverter. A simple control algorithm, a differential algorithm and a PWM algorithm are pro.grammed into a INTEL 8097 micro regulator. The control algorithm ramps up the stator frequencies of the machines in a fixed time interval to a value determined by the operator. This results in a constant relation between the two frequencies, complying to the differential requirement. During an overcurrent situation, the control ramps the machine frequencies to a value which will tend to reduce the stator currents while still complying to the differential requirement. The airgap flux of the machines is kept constant by keeping the relation of the stator frequency to the stator voltage constant, except in the low speed area, where the stator voltage is altered to compensate for the voltage drop over the stator resistance. Because of the operator closing some sort of a speed feedback loop, no attempt was made to reduce the speed error of the drive caused by the slip-nature of induction machines. In order to test the drive under different operating conditions, a test setup was developed, employing DC machines connected mechanically to the traction machines.
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An object oriented representation for mechanical design based on constraintsMcGinnis, Brian D. 07 June 1990 (has links)
A representation for the process of mechanical design,
along with its computer implementation is presented and
discussed. The representation consists of three
fundamental concepts: design objects, constraints, and
decisions. The design objects are the structures with
which the physical artifacts of the design are described.
A design object consists of a set of attributes that
represent the properties and characteristics of that
object. The values of these attributes are specified by
the constraints of the design.
The constraints specify the values of and relations
between the attributes of the design object. The
conglomeration of design objects and their respective
constraints define the state of the design. The state of
the design can be thought of as a snapshot of the design
taken at any particular time in the design process.
Changes to this state occur through the introduction of
new constraints into the design space.
New constraints are brought into the design by the
application of a design decision. The design decision
process consists of a set of input constraints, an
evaluation performed on those input constraints and the
subsequent generation of one or more new resulting
constraints. These new constraints in turn affect the
attribute values and relations of the design objects,
thereby changing the state of the design.
This representation is capable of storing not only the
final state of a design, but the initial and intermediate
states as well. Maintained also, is the process of change
from one design state to the next. By using this
representation, one can inspect the evolution of design
objects, the propagation and dependencies of the
constraints, and the rationale behind the decisions of the
design.
This representation was developed from data extracted
from mechanical design protocols. These protocols were of
mechanical designers solving original design problems and
consisted of video recordings, verbal transcripts, and the
designer's original drawings.
The representation was implemented in HyperClass, an
object oriented programming environment. The
implementation is capable of generating and displaying
graphical images of the design. The design information
extracted from the protocols can be recorded by the
implementation developed. / Graduation date: 1991
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A methodology for producing and testing a Genesil Silicon Compiler designed VLSI chip which incorporates Design for TestabilityPooler, Brian Lee. January 1990 (has links) (PDF)
Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, September 1990. / Thesis Advisor(s): Loomis, Herschel H. Second Reader: Yang, Chyan. "September 1990." Description based on title screen as viewed on December 17, 2009. DTIC Descriptor(s): Scanning, Conversion, Files(Records), Simulation, Methodology, Models, Paths, Very Large Scale Integration, Time, Engineering, Silicon, Vector Analysis, Compilers, Automatic, Faults, Test And Evaluation. DTIC Identifier(s): Computer Aided Design, Circuit Testers, Theses. Author(s) subject terms: Design for testability, VLSI, Genesil Silicon Compiler, Automatic Test Generation, DAS 9100, DV550. Includes bibliographical references (p. 161-162). Also available in print.
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